Advanced Packaging Modeling Expert - FEA at Applied Materials

Santa Clara, California, United States -

Full Time

Start Date

Immediate

Expiry Date

19 Jan, 26

Salary

0.0

Posted On

21 Oct, 25

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Finite Element Analysis, Thermal Modeling, Mechanical Behavior, Stress Analysis, Reliability Risks, Thermal Cycling, Advanced Packaging Technologies, Materials Behavior, Multi-Physics Simulations, Scripting, Automation, JEDEC Reliability Standards, Simulation Workflows, Design Optimization, Collaboration, Problem-Solving

Industry

Semiconductor Manufacturing

Description

Develop and validate detailed finite element analysis (FEA) models to simulate thermal and mechanical behavior of advanced semiconductor packages. Perform simulations to evaluate stress, strain, warpage, delamination, thermal cycling, and reliability risks across a wide range of package architectures (e.g., flip-chip, fan-out, 2.5D/3D IC, chiplet-based designs, TSVs). Conduct thermal modeling to assess heat dissipation in complex package structures, supporting thermal design optimization and advanced cooling technology development. Collaborate with cross-functional teams to define simulation requirements, interpret results, and provide actionable design and process recommendations. Support technology roadmap development by evaluating new materials, interconnect structures, and process flows from a thermo-mechanical reliability perspective. Drive design-of-experiment (DOE) studies and sensitivity analyses to understand key drivers of package performance and reliability. Contribute to the development and automation of internal simulation workflows, tools, and best practices to improve modeling efficiency and accuracy. Document and present simulation methodologies, results, and recommendations to both technical and executive audiences. Stay current with industry trends, emerging technologies, and academic research in advanced packaging and simulation methodologies. M.S. or Ph.D. in Mechanical Engineering, Materials Science, Applied Physics, or a related field. 5-10 years of hands-on industry experience in thermal-mechanical FEA modeling, in the semiconductor or electronics packaging domain. Thorough understanding of advanced packaging technologies, including flip-chip, fan-out wafer-level packaging (FOWLP), 2.5D/3D integration, chiplet architectures, and through-silicon vias (TSVs). Proficient with commercial FEA tools such as ANSYS, Abaqus, COMSOL, or equivalent. Strong knowledge of materials behavior, including polymers, metals, ceramics, and their interactions under thermal and mechanical loads. Familiarity with semiconductor packaging processes, including die attach, underfill, molding, bumping, and reflow. Excellent analytical, problem-solving, and communication skills. Proven ability to work independently and collaboratively in a fast-paced, cross-functional environment. Experience with multi-physics simulations, including coupled electro-thermal-mechanical analysis. Familiarity with JEDEC reliability standards and qualification tests (e.g., TCoB, HTS, uHAST, drop test). Experience with scripting and automation (e.g., Python, TCL, MATLAB) to streamline simulation workflows. Exposure to package design tools such as Cadence, Mentor Graphics, or equivalent.

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Responsibilities

Develop and validate detailed finite element analysis (FEA) models to simulate thermal and mechanical behavior of advanced semiconductor packages. Collaborate with cross-functional teams to define simulation requirements and provide actionable design and process recommendations.