Analog Engineer - Layout design at Ciena Corp

Brunswick, Lower Saxony, Germany -

Full Time

Start Date

Immediate

Expiry Date

28 May, 26

Salary

0.0

Posted On

27 Feb, 26

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Layout Design, Circuit Design Implementation, Circuit Verification, Optical Communication, CMOS Integrated Circuits, EDA Tools, Cadence Virtuoso, Innovus, Calibre, Synopsys Tools, DRC, LVS, ERC, EM/IR Checks, Physical Verification, Simulation

Industry

Telecommunications

Description

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact. How You Will Contribute: As a layout design engineer, you will be responsible for doing the implementation and verification of circuit designs for optical communication. As part of a wider development team, you will interact and collaborate with many designers from different teams to provide the optimum solutions to meet product performance and quality. As layout design engineer you will work with the latest silicon technologies in CMOS integrated circuits manufacturing. You will be part of a world-class R&D development team. You will conduct layout designs applying latest tools to meet the performance requirements of the respective circuit blocks and meet the design rules of the respective technology You will create circuit views and will verify its performance by simulation You will implement higher level blocks for top level integration. The Must Haves: • Master’s degree or bachelor’s in electrical engineering, computer science or related subject. • 3+ years of industry experience is a plus in analog/mixed-signal IC layout, high-speed SerDes, or optical PHY design. • Hands-on experience with EDA tools such as Cadence Virtuoso, Innovus, Calibre, or Synopsys tools • Experience with DRC, LVS, ERC, EM/IR checks, and physical verification flows Assets: Strong analytical and debugging skills. Self-motivated, ability to work in a multi-disciplinary multi-site team Own assignments with full accountability, remain engaged, be proactive and positive while solving very challenging problems. Excellent language skills in English and basic skills in German. Not ready to apply? Join our Talent Community to get relevant job alerts straight to your inbox. At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination. Ciena is an Equal Opportunity Employer, including disability and protected veteran status. If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require. Join our Talent Community and get early job alerts, personalized career tips, and insider insights. Discover how Ciena's unique blend of deep humanity and relentless innovation creates an exceptional workplace culture. Explore CienaLife.

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Responsibilities

The layout design engineer will be responsible for the implementation and verification of circuit designs for optical communication, collaborating with various design teams to meet performance and quality targets. This involves conducting layout designs using the latest tools and technologies to meet performance requirements and design rules, creating circuit views, verifying performance via simulation, and implementing higher-level blocks for top-level integration.