Analog Mixed Signal IP Integration Engineer (m/f/d) at Apple
München, , Germany -
Full Time


Start Date

Immediate

Expiry Date

09 Nov, 25

Salary

0.0

Posted On

09 Aug, 25

Experience

7 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

Integration, Rtl Design, Upf, Apple, Mipi, Synthesis, Rdc, Ownership, Cdc, Model Validation, Displayport, Communication Skills, Design Flow, Systemverilog, Disabilities, Usb, Lint, Static Timing Analysis, Verilog, Affirmative Action

Industry

Information Technology/IT

Description

In this highly visible role, you will support the integration of 3rd party IP in the SOCs developed by Apple. Your job is to verify that the IP deliverables are meeting Apple’s high quality standards and get flawlessly integrated. The role involves working closely with different cross-functional teams within Apple as well as with external vendors. Occasional travel might be required. At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a forward-thinking and especially motivated Analog Mixed Signal IP Integration Engineer! As a member of our dynamic group, you will have the rare and great opportunity to work on upcoming products that will delight and encourage millions of Apple’s customers every day!

DESCRIPTION

  • Define and specify deliverable requirements for IP provided by external vendors - Driving discussions with vendors regarding these requirements, their design and verification methodology - Review IP quality on incoming deliverables - Provide support to Apple SOC front-end and back-end design teams for integrating the IP

MINIMUM QUALIFICATIONS

  • BSEE/MSEE and 7+ years industry related experience.
  • Proficiency in English language is required.

PREFERRED QUALIFICATIONS

  • Experience with Verilog modeling and model validation is a plus
  • Experience with standards like PCI Express, MIPI, USB or DisplayPort is a plus
  • Excellent written and verbal communication skills
  • Strong initiative and ownership of responsibilities, productive, able to meet aggressive deadlines
  • Experience in RTL design, verification or integration
  • Deep knowledge and experience with front-end tools such as simulation, synthesis, lint, logic equivalence, static timing analysis, CDC, RDC, and UPF
  • Familiarity with SOC design flow and verification methodologies
  • Good understanding of DFT requirements for SOCs
  • Experience writing Verilog, SystemVerilog, SVA hardware description languagesApple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.

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Responsibilities

Please refer the Job description for details

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