Analog/RF Design Engineering Intern at Qorvo
3UB, , Netherlands -
Full Time


Start Date

Immediate

Expiry Date

04 Dec, 25

Salary

0.0

Posted On

06 Sep, 25

Experience

0 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

Spectre, Communication Skills, Circuit Design, Verilog Ams

Industry

Electrical/Electronic Manufacturing

Description

ANALOG/RF DESIGN ENGINEERING INTERN

Experience Level: Support
Job Type: Regular
Location:Utrecht, NL, 3511 SB
Requisition ID: 9349
Qorvo (Nasdaq: QRVO) supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems-level expertise and global manufacturing scale to quickly solve our customers’ most complex technical challenges. Qorvo serves multiple high-growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace/defense. Visit www.qorvo.com to learn how our innovative team is helping connect, protect and power our planet.
Qorvo’s Internship Program is designed for college students currently enrolled in an accredited Bachelor’s, Master’s, or PhD program. Qorvo offers real work experience, exposure to upper management, and the opportunity to pursue full-time opportunities, as available.

SUMMARY:

Qorvo is looking for a student to work as a RF/Analog Integrated Circuits Design Engineering Intern in Utrecht for a period of 6 to 9 months starting May 2026.
The student in this position will be working on improving the analog/RF part of our BLE/ZigBee SOCs. Preferably on the new and innovative parts.
The scope of the work will depend heavily on the candidate’s experience level and skill set.

QUALIFICATIONS:

  • Candidate shall be currently enrolled in an accredited program seeking an MS or PhD in Electrical Engineering with focus on RF/Analog circuit design.
  • Student must have completed some relevant mixed- signal/analog/RF circuit design course work.
  • Candidate shall be proficient with Cadence (Spectre and Verilog-AMS) simulation software.
  • Knowledge of python programming is a plus.
  • Self-Starter with good communication skills.
Responsibilities
  • Perform system work on the blocks/circuits
  • Assist in the design at block level in CMOS.
  • Layout (a part of) a block in a deep sub micron IC process
  • Prepare and present design review(s) to peers summarizing work/results.
  • Measure and analyze radio performance of our SOCs in the engineering lab.
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