Applied AI Engineer, Silicon Engineering at Etched

San Jose, California, United States -

Full Time

Start Date

Immediate

Expiry Date

20 Sep, 26

Salary

275000.0

Posted On

22 Jun, 26

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

LLM Agent Development, Python, Context Engineering, Tool Integration, Orchestration, Failure Analysis, Evaluation Design, RTL Design, SystemVerilog, UVM, Tcl Scripting, RAG, Multi-agent Orchestration, C++, Rust, CI/CD

Industry

Computer Hardware Manufacturing

Description

Applied AI Engineer, Silicon Engineering About Etched Etched is building AI chips that are hard-coded for individual model architectures. Our first product (Sohu) only supports transformers, but has an order of magnitude more throughput and lower latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Job Summary We are using AI to build AI chips. AI agents are starting to genuinely work for verification, debug, and EDA flows — we want someone to bring that inside Etched and push past it. As an Applied AI Engineer, you will embed with our hardware teams — RTL design, verification, DFT, physical design, and silicon validation — and build the agents and tooling that multiply their output. You'll wire LLM agents into simulators, regressions, waveform and log analysis, EDA flows, and bring-up workflows, and own the evals that separate demos from tools engineers actually rely on. This is an internal, force-multiplier role: your success is measured by how much faster the chip team moves, not by lines of code you ship yourself. It is not a customer-facing role and not about inference serving — it's AI applied to how we build the chip itself. You do not need to be a chip designer or a traditional software engineer — you need to be an exceptional problem solver who has shipped real agentic systems, works comfortably across stacks and domains, and uses AI to ramp on hard new problems fast. Key responsibilities Build, deploy, and maintain LLM-agent workflows that accelerate chip development: debug triage, testbench and coverage work, log/waveform analysis, EDA script generation, and engineering knowledge retrieval Embed with hardware teams to find the highest-leverage pain points, then turn them into automated workflows with measurable adoption Design rigorous evals for agent performance on real silicon-engineering tasks — not proxy metrics — and use them to drive iteration Integrate agents with our internal infrastructure: simulation and emulation flows, CI/regression systems, lab equipment, and issue tracking, via tool-calling and MCP Champion adoption: documentation, training, and fast feedback loops with the engineers who use what you build You may be a good fit if you have A track record of solving hard problems across stacks and domains — you enjoy being dropped into unfamiliar territory and figuring it out Comfort with Python and code: you can read it, modify it, debug it, and direct AI to write it well. We do not care whether you write code from scratch — we care whether you ship things that work Fluency using AI to learn and ramp on new problems — agentic coding tools, deep research, and frontier models are how you work, not an add-on Hands-on experience building and shipping LLM-based agents or AI tooling that real users depend on (beyond calling an API — context engineering, tool integration, orchestration, failure analysis) An eval-driven mindset: you measure whether AI systems actually work before scaling them High agency and comfort with ambiguity — you can find the problem, not just solve the stated one Interest in chip development and the ability to ramp quickly on a deeply technical domain. Hardware experience is a real plus, but not required — you will be willing and able to learn quickly Strong candidates may also have experience with Chip development in any form (the strongest plus): RTL/SystemVerilog, functional verification (UVM), DFT, physical design/STA, FPGA, emulation, or silicon bring-up and validation EDA tool flows and Tcl scripting; reading waveforms, logs, and regressions Fine-tuning or post-training (SFT, RLHF/DPO), RAG over proprietary technical data, or multi-agent orchestration Deep software engineering: C++ or Rust, developer-facing internal platforms, CI/CD at scale, or infrastructure (Docker, Slurm, Ray) Representative projects In your first 30 days, pick one hardware team's worst recurring pain, ship an agent for it, and prove adoption with usage data Build an agent that triages overnight regression failures, clusters them by root cause, and drafts bug reports with waveform and log evidence attached Wire Claude Code-style agents into our EDA and validation flows via MCP so engineers can drive simulations, queries, and lab equipment from natural language Create a retrieval system over our specs, design docs, and past debug history that cuts ramp time for new engineers Design an eval suite that measures agent performance on real verification and debug tasks, and use it to decide which workflows to automate next Prototype AlphaEvolve-style optimization loops that propose and automatically verify improvements to test programs or flow scripts Benefits Full medical, dental, and vision packages, with generous premium coverage Housing subsidy of $2,000/month for those living within walking distance of the office Daily lunch and dinner in our office Relocation support for those moving to San Jose (Santana Row) Unlimited compute budget subject to ROI justification How we're different Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs. We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.

Responsibilities

Build and deploy LLM-agent workflows to accelerate chip development tasks such as debug triage, log analysis, and EDA script generation. Embed with hardware teams to automate high-leverage pain points and integrate agents into internal simulation and emulation infrastructure.