Piper Companies is hiring an ASIC Architect with a small start up based in Saratoga, CA. The ASIC Architect will drive the architectural definition of next-generation data center networking ASICs—shaping switch architectures, performance frameworks, and high-efficiency data paths tailored for AI training and inference. The ASIC Architect will need to sit on site in Saratoga, CA 5 days per week.

REQUIREMENTS FOR THE ASIC ARCHITECT:

• MSEE or equivalent with 10+ years in semiconductors; 5–7 years in ASIC architecture
• Background in CPUs, GPUs, DPUs, or switches
• Strong problem-solving and architecture methodology skills
• Experience with queueing, memory, and scheduling in high-throughput systems
• Familiar with scalable memory, crossbars, and high-speed datapaths
• Bonus: knowledge of networking protocols
• Excellent communication and documentation skills

• Define architectures for high-performance networking ASICs
• Translate system goals into scalable architecture plans
• Drive queuing, memory, and scheduling strategies
• Model and evaluate performance trade-offs
• Collaborate across RTL, verification, and firmware teams
• Oversee integration of high-speed I/O and memory interfaces
• Support post-silicon bring-up and debug