ASIC Backend Developer at Ericsson

London, England, United Kingdom -

Full Time

Start Date

Immediate

Expiry Date

23 Feb, 26

Salary

0.0

Posted On

25 Nov, 25

Experience

0 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Backend Development, Synthesis, Static Timing Analysis, Power Optimization, EDA Tools, Scripting Languages, UNIX/Linux, Low-Power Design, VHDL/System Verilog, Collaboration, Communication Skills, Multi/Many-Core CPU Architectures, Clear Case, Git, Floor Planning, Physical Implementation

Industry

Telecommunications

Description

Assist in backend development tasks, including synthesis, constraints setup, equivalence checking, and place-and-route under guidance, contributing to the delivery of high-quality digital ASICs. Support the static timing analysis, timing sign-off activities, and help with optimizing timing/area/power using Synopsys tools (Design Compiler, PrimeTime, ICC2/FC/Innovus) with mentorship. Gain hands-on experience with EDA tools and help develop scripts (Python, TCL, Linux Shell) to automate processes and improve project efficiency. Learn and contribute to innovations in low-power design using UPF and assist in providing input on physical implementation and floor planning. Work collaboratively with cross-functional teams in a supportive, knowledge-sharing environment, ensuring smooth integration and execution. Foundational experience in backend development, with growing specialization in synthesis, static timing analysis (STA), and power optimization within semiconductor design. Contributed to multiple successful ASIC tape-outs, gaining hands-on exposure to the full development cycle. Hands-on Knowledge and proficiency in EDA tools (Synopsys Design Compiler, Fusion Compiler, PrimeTime, ICC2/Innovus, Formality/LEC ) for timing, area, power closure on advanced technology nodes. Good to have experience in scripting languages (Python, Perl, TCL, and Linux Shell) to automate and streamline workflows. Comfortable in UNIX/Linux environments, essential for efficient and effective backend operations. Commitment to Quality is a keen eye for detail and experience maintaining high standards in complex, high-impact projects. Knowledge on low-power design techniques, including UPF application and VHDL/System Verilog for RTL2GDS flows. A collaborative mindset with a strong focus on innovative solutions and continuous improvement in fast-paced environments. Solid communication skills, able to explain technical topics clearly and collaborate effectively across teams. Good to have knowledge on Multi/Many-Core CPU architectures. Proficient in Clear Case, Git, and Synopsys tools like Spyglass, Design Compiler, and Formality for optimised backend development. Familiarity with mobile communication standards, telecom, floor planning, and physical implementation to enhance ASIC design effectivenes The chance to use your skills and imagination to push the boundaries of what´s possible. To build solutions never seen before to some of the world's toughest problems. You´ll be challenged, but you won't be alone. You´ll be joining a team of diverse innovators, all driven to go beyond the status quo to craft what comes next. What happens once you apply? Click Here to find all you need to know about what our typical hiring process looks like. We truly believe that by collaborating with people with different experiences we drive innovation, which is essential for our future growth. learn more. Primary country and city: Sweden (SE) || Lund Req ID: 764051

Responsibilities

Assist in backend development tasks for high-quality digital ASICs, including synthesis and timing analysis. Collaborate with cross-functional teams to ensure smooth integration and execution.