DESCRIPTION

Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world.
Key job responsibilities
Gate Level Simulation: Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing. Analyze simulation results, identify and debug logic errors, and propose solutions. Work closely with design and verification engineers to validate fixes and ensure design closure.
Facilitate seamless integration across Firmware, RTL, Platform Software, and Platform Drivers.
Develop Debug tools: RTL Emulation, silicon bring-up, and functional validation.
Export Control Requirement:
Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Key job responsibilities

• Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and performance targets.
• Define, configure and integration SoC Subsystems
• Contribute to the SoC floor planning effort
• Define and develop any necessary support logic
• Configure, instantiate and integrate 3rd party IP blocks
• Understand low power design & the impact of DFT on the blocks
• Perform initial synthesis & timing analysis
• Assist verification team in unit verification including test plan development
• Assist with debug and bring-up

BASIC QUALIFICATIONS

• 5+ years of non-internship professional software development experience

• 5+ years of programming with at least one software programming language experience -

• 5+ years of leading design or architecture (design patterns, reliability and scaling) of new and existing systems experience

• 5+ years of digital design experience, preferably in SoC design and implementation

PREFERRED QUALIFICATIONS

• 5+ years of full software development life cycle, including coding standards, code reviews, source control management, build processes, testing, and operations experience
• Master’s degree in computer science or equivalent
  Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.
  Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.
  Our compensation reflects the cost of labor across several US geographic markets. The base pay for this position ranges from $129,800/year in our lowest geographic market up to $212,800/year in our highest geographic market. Pay is based on a number of factors including market location and may vary depending on job-related knowledge, skills, and experience. Amazon is a total compensation company. Dependent on the position offered, equity, sign-on payments, and other forms of compensation may be provided as part of a total compensation package, in addition to a full range of medical, financial, and/or other benefits. For more information, please visit https://www.aboutamazon.com/workplace/employee-benefits. This position will remain posted until filled. Applicants should apply via our internal or external career site

• Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and performance targets.
• Define, configure and integration SoC Subsystems
• Contribute to the SoC floor planning effort
• Define and develop any necessary support logic
• Configure, instantiate and integrate 3rd party IP blocks
• Understand low power design & the impact of DFT on the blocks
• Perform initial synthesis & timing analysis
• Assist verification team in unit verification including test plan development
• Assist with debug and bring-u