ASIC Design Engineer – ML Processor & Digital IP at Advanced Micro Devices, Inc

San Jose, California, United States -

Full Time

Start Date

Immediate

Expiry Date

15 May, 26

Salary

0.0

Posted On

14 Feb, 26

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Asic Design, Machine Learning Processor Architecture, Digital Design, Rtl Implementation, Design Verification, Physical Design, Ppa, Feature Definition, Code Coverage, Functional Coverage, Computer Architecture

Industry

Semiconductor Manufacturing

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: As a ASIC Design Engineer, ML Processor & Digital IP you will work on defining and implementing features in key IPs.. THE PERSON: You have a passion for modern ML processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Drive feature definition and RTL implementation. Collaborate with Architects , Design Verification and Physical Design teams. Responsible for various design quality metrics like PPA, feature/test pass rates, code coverage and functional coverage. PREFERRED EXPERIENCE: Project level experience with design concepts and RTL implementation for same Experience or familiarity with industry standard ASIC design tools. Good understanding of computer architecture and PPA trade-offs. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering preferred. This role is not eligible for Visa sponsorship. #LI-BM1 #LI-Hybrid Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Responsibilities

The role involves defining and implementing features in key Intellectual Properties (IPs) related to ML Processors and Digital IP. Key responsibilities include driving feature definition, RTL implementation, and collaborating with Architects, Design Verification, and Physical Design teams while monitoring design quality metrics like PPA.