Start Date
Immediate
Expiry Date
13 May, 26
Salary
135896.0
Posted On
12 Feb, 26
Experience
0 year(s) or above
Remote Job
Yes
Telecommute
Yes
Sponsor Visa
No
Skills
Micro architecture, RTL Implementation, CPU Complex Design, DDR Interface, Flash Interface, Debug IP Design, Proprietary IP Design, ASIC Integration, Verilog, System Verilog, EDA Tools, AI Tools, Python, TCL, Design Automation, ASIC Verification
Industry
Semiconductor Manufacturing