ASIC Design Verification Engineer - Graphics IP at Advanced Micro Devices, Inc

Markham, Ontario, Canada -

Full Time

Start Date

Immediate

Expiry Date

14 Feb, 26

Salary

0.0

Posted On

16 Nov, 25

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

ASIC Verification, UVM, Verilog, System Verilog, C, C++, Simulation Tools, Scripting, Debugging, Test Plan Development, Functional Verification, Performance Verification, Testbench Development, Code Coverage, Leadership, Mentorship

Industry

Semiconductor Manufacturing

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: We are looking for an adaptive, self-motivatived ASIC Design Verification Engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading GPU and AI technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases Build testbench components to support the next generation IP Develop/Maintain tests for functional verification and performance verification at the block level Maintain or improve current test libraries to support IP level testing Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements PREFERRED EXPERIENCE: Proficient in IP level ASIC verification Proficient in developing UVM based verification frameworks and testbenches, processes and flows Well versed with Verilog, System Verilog, C, and C++ Exposure to simulation profiling, efficiency improvement, acceleration, HLS tools/process Proficient in RTL coding using simulation tools Scripting language experience: Perl/Python/Ruby and Makefile, shell preferred. Experience in Formal Verification will be an added advantage Verification of Graphics pipeline/Cache System is desired Exposure to leadership or mentorship is an asset ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering LOCATION: MARKHAM, Ontario CA #LI-CJ3 #LI-Hybrid Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Responsibilities

Collaborate with architects and engineers to verify new features and build test plans. Develop and maintain tests for functional and performance verification while debugging test failures.