ASIC Developer

at  Ericsson

Stockholm, Stockholms län, Sweden -

Start DateExpiry DateSalaryPosted OnExperienceSkillsTelecommuteSponsor Visa
Immediate07 Nov, 2024Not Specified08 Aug, 2024N/AStatic Timing Analysis,Perl,Python,Verilog,Computer Science,Bash,Scripting LanguagesNoNo
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Description:

Skills You Bring:

  • Basic knowledge of ASIC IP/ASIC SoC design, RTL, Verilog, UVM, and System Verilog.
  • Familiarity with front-end tools, including Verilog simulators, RTL/Verification lines, and clock domain crossing checkers.
  • Understanding synthesis, static timing analysis, and Design-For-Test (DFT).
  • Knowledge of System-Verilog assertions, checkers, and advanced design verification techniques is a plus
  • Basic proficiency in scripting languages such as Perl, Python, bash,etc.
  • An understanding of modern design methodologies and techniques.
  • Ability to coordinate geographically dispersed engineering teams.
  • MS in Electrical Engineering, Computer Science, or a related field

Responsibilities:

  • Assist in the day-to-day development, deployment, and support of complex Frontend Design & Verification tool flows.
  • Contribute to driving innovation in design processes and methodologies.
  • Build relationships with Project, Program, and engineering stakeholders, ensuring alignment with project goals and timelines.
  • Work closely with different design, verification, testing, and manufacturing teams to foster collaboration.
  • Facilitate effective communication and collaboration among various groups.
  • Identify and address technical challenges that arise during the silicon design process.
  • Assist in implementing processes to ensure the quality of silicon design, including design reviews, testing methodologies, and quality assurance practices.
  • Foster a collaborative and positive work environment.

Skills You Bring:

  • Basic knowledge of ASIC IP/ASIC SoC design, RTL, Verilog, UVM, and System Verilog.
  • Familiarity with front-end tools, including Verilog simulators, RTL/Verification lines, and clock domain crossing checkers.
  • Understanding synthesis, static timing analysis, and Design-For-Test (DFT).
  • Knowledge of System-Verilog assertions, checkers, and advanced design verification techniques is a plus
  • Basic proficiency in scripting languages such as Perl, Python, bash,etc.
  • An understanding of modern design methodologies and techniques.
  • Ability to coordinate geographically dispersed engineering teams.
  • MS in Electrical Engineering, Computer Science, or a related field.


REQUIREMENT SUMMARY

Min:N/AMax:5.0 year(s)

Information Technology/IT

Engineering Design / R&D

Software Engineering

MSc

Computer Science, Electrical, Electrical Engineering, Engineering

Proficient

1

Stockholm, Sweden