ASIC Digital Design, Staff Engineer at Synopsys
Dublin, County Dublin, Ireland -
Full Time


Start Date

Immediate

Expiry Date

14 Jun, 25

Salary

0.0

Posted On

15 Mar, 25

Experience

0 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

Good communication skills

Industry

Information Technology/IT

Description

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are: A passionate and detail-oriented ASIC Digital Verification Engineer ready to make an impactful contribution. You bring a strong foundation in digital design and verification, with a deep understanding of RTL design, simulation, and debugging. Your expertise in creating and executing comprehensive verification plans ensures the highest quality of silicon chips. You thrive in a collaborative environment but are also capable of driving projects independently. Your analytical mindset and problem-solving skills enable you to tackle complex verification challenges effectively. You are committed to continuous learning and staying updated with the latest advancements in verification methodologies and tools.
You possess a meticulous approach to verification, ensuring every aspect of the design is thoroughly tested and validated. With a keen eye for detail, you can identify potential issues early in the design process, preventing costly errors down the line. Your experience with industry-standard tools and methodologies allows you to contribute effectively from day one. You are not only technically proficient but also an excellent communicator, capable of articulating complex verification concepts to both technical and non-technical stakeholders. Your proactive attitude and innovative mindset drive you to continuously seek improvements and efficiencies in the verification process.

Responsibilities
  • Developing and implementing verification plans for complex ASIC designs.
  • Creating and maintaining testbenches using SystemVerilog/UVM.
  • Executing simulation and debugging of RTL designs to ensure functionality and performance.
  • Collaborating with design and architecture teams to identify and resolve bugs.
  • Automating verification processes to enhance efficiency and coverage.
  • Conducting code reviews and providing feedback to improve verification quality.
  • Analyzing verification results and generating comprehensive reports.
  • Participating in design reviews and contributing to the overall design verification strategy.
  • Performing regression testing and analyzing coverage metrics to ensure thorough verification.
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