ASIC Digital Verification Engineer at Synopsys
Dublin, County Dublin, Ireland -
Full Time


Start Date

Immediate

Expiry Date

09 Jun, 25

Salary

0.0

Posted On

09 Mar, 25

Experience

1 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

Good communication skills

Industry

Information Technology/IT

Description

WE ARE:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

YOU ARE:

You are a driven and meticulous ASIC Digital Verification Engineer, keen to make a significant impact in the semiconductor industry. You possess a strong foundation in digital verification methodologies and have a keen eye for detail. With a collaborative spirit, you thrive in a team environment while also excelling when working independently. Your communication skills are top-notch, allowing you to articulate complex technical concepts with ease. You are passionate about innovation and are always looking for ways to improve processes and outcomes. Your proficiency in UVM and SystemVerilog, combined with your programming skills in languages such as C, TCL, Perl, or Python, positions you as a valuable asset to any team. You are committed to driving productivity, performance, and throughput through advanced verification solutions. Your experience in assertion verification, coverage analysis, and protocol-oriented performance analysis demonstrates your capability to handle complex verification tasks. Fluent in English, you are ready to contribute to a dynamic and forward-thinking team.

Responsibilities
  • Writing comprehensive verification plans and specifications.
  • Making critical architecture decisions on test bench design.
  • Implementing test bench infrastructure and developing test cases.
  • Utilizing a coverage-driven methodology for verification.
  • Collaborating with architects, designers, and other verification team members globally.
  • Ensuring the interoperability between DDR digital controllers and mixed-signal PHYs.
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