ASIC Floorplan Design Engineer at NVIDIA

Shanghai, Shanghai, China -

Full Time

Start Date

Immediate

Expiry Date

13 Aug, 26

Salary

0.0

Posted On

15 May, 26

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

ASIC Floorplan Design, VLSI, Computer Architecture, Verilog, System Verilog, CAD, Physical Design, Power Distribution, Clock Distribution, Packaging, Place and Route, Timing Closure, Python, Perl, C/C++, SoC Design

Industry

Computer Hardware Manufacturing

Description

We are now looking for an ASIC Floorplan Design Engineer. NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world’s leading SoC's and GPU's. This position offers you a unique opportunity to craft and to influence the design and development of the next generation GPU and SoC, allowing you to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. What you will be doing: Working with architects, design leads, physical design leads and package leads, you will develop and to craft and optimize floorplans during early chip development. Drive the area review process and collaborate with the ASIC design team to identify area, interconnect and floorplan improvement opportunities. Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and physical implementation decisions. You will build tools and improve existing infrastructure to optimize chip area and speed of execution. What we need to see: Masters Degree in Electrical Engineering, Computer Science, or Computer Engineering or equivalent work experience. At least 3+ years of relevant work experience. A deep hardware engineering background with a concentration in VLSI and/or Computer Architecture. Experience in Verilog, System Verilog or similar HVL. Experience with CAD and physical design methodologies (flow and tool development), chip floorplan, power/clock distribution, packaging, P&R and timing closure. Strong communication and interpersonal skills and ability & desire to work as a great teammate should be displayed in your interview. Python, Perl and C/C++ programming language experience. Ways to stand out from the crowd: Experience in driving development of large scale ASIC floorplan is a huge plus. NVIDIA is widely considered to be one of the technology world’s most desirable employers. Our products are leading the way with groundbreaking developments in Artificial Intelligence, Autonomous Driving, High-Performance Computing and Visualization. We have some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the fastest and most power efficient chips in their class? If so, we want to hear from you. NVIDIA pioneered accelerated computing. Today, our AI infrastructure powers global intelligence, transforming every industry. Learn more about NVIDIA.

Responsibilities

Develop and optimize floorplans for next-generation GPUs and SoCs during early chip development. Collaborate with design teams to resolve timing and routing congestion while building tools to improve chip area and execution speed.