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ASIC Power Engineer at Apple
San Diego, California, United States -
Full Time

Start Date

Immediate

Expiry Date

01 Jan, 26

Salary

0.0

Posted On

03 Oct, 25

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

ASIC Logic Design, Low Power Design, Power Modeling, Power Analysis, Scripting Languages, Problem Solving, Analytical Skills, Wireless Technologies, SOC Components, Power Reduction, Post-Silicon Correlation, Power Specification, Power Vectors, Pre-Silicon Power Data, STA Knowledge, DV Support

Industry

Computers and Electronics Manufacturing

Description
Would you like to join Apple’s growing wireless silicon development team? Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy-efficient / low-power design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering teams. In this highly visible role, you will be at the center of low-power architecture, power modeling and correlation efforts with a critical impact on getting functional products to hundreds of millions of customers quickly. Will you join us and do the best work of your life here? DESCRIPTION In this role, and as part of our team, you are going to work on power modeling, analysis and correlation tasks for wireless communication SoCs, including: • Define power-efficient SOC architecture and schemes, write power spec. • Estimate pre-silicon power, build wireless application and atomic power model with high accuracy. • Define and generate power vectors with Design and DV support. • Collect pre-silicon power data using power flow and tools. • Analyze and identify power reductions. • Support post-silicon power correlation. MINIMUM QUALIFICATIONS BS degree is required. Understand ASIC logic design. Basic knowledge of low power design and UPF. Scripting languages (Shell, Perl or Python) Strong problem solving and analytical skills PREFERRED QUALIFICATIONS MSEE/PhD degree. Low power design experience. Knowledge on common SOC components, e.g. CPU, fabric, peripherals and PCIe. Exposure to Wireless technologies, including WIFI, BT and UWB. ASIC PD, STA knowledge.
Responsibilities
You will work on power modeling, analysis, and correlation tasks for wireless communication SoCs. This includes defining power-efficient SOC architecture, estimating pre-silicon power, and supporting post-silicon power correlation.