Start Date
Immediate
Expiry Date
01 Jul, 26
Salary
0.0
Posted On
02 Apr, 26
Experience
5 year(s) or above
Remote Job
Yes
Telecommute
Yes
Sponsor Visa
No
Skills
System Verilog, UVM, RTL Verification, Constrained Random Verification, Functional Coverage, AMBA Protocols, ARM Processor, SoC Verification, Perl, TCL, Cadence, Synopsys, Mentor Graphics, Formal Verification, VHDL, Verilog
Industry
Software Development