ASIC Verification EEJ 2026 at Bosch Group
Bengaluru, karnataka, India -
Full Time


Start Date

Immediate

Expiry Date

01 Jul, 26

Salary

0.0

Posted On

02 Apr, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

System Verilog, UVM, RTL Verification, Constrained Random Verification, Functional Coverage, AMBA Protocols, ARM Processor, SoC Verification, Perl, TCL, Cadence, Synopsys, Mentor Graphics, Formal Verification, VHDL, Verilog

Industry

Software Development

Description
Company Description Bosch Global Software Technologies Private Limited is a 100% owned subsidiary of Robert Bosch GmbH, one of the world's leading global supplier of technology and services, offering end-to-end Engineering, IT and Business Solutions. With over 27,000+ associates, it’s the largest software development center of Bosch, outside Germany, indicating that it is the Technology Powerhouse of Bosch in India with a global footprint and presence in the US, Europe and the Asia Pacific region. Job Description Job DescriptionTasks : Verification of SoCs, automotive ASICs, subsystems, IPs.Application of Metric-driven Verification (MDV) and/or Formal Verification methodologiesDeveloping and tracking of Verification plansDevelop verification environments from scratchCreate VIPIntegration of VIP („Verification-IP“)Measure and analyze regression resultsContinuous improvement of verification methods/tools/flows/processes together with EDA partners Requirement:5 to 10 years of Experience in Digital RTL verification using System Verilog and UVM.Sound knowledge of constrained random verification, UVM/OVMSound knowledge in System Verilog.Experience of developing functional coverage code, coverage analysis.Experience of developing verification environments from scratch is desirable.Good hands on experience with cadence/Synopsys/Mentor tools.Exposure to configuration management, bug tracking tool etc.Knowledge of scripting language, Perl TCL etc.Good experience with AMBA protocolsWorking knowledge on ARM processor-based subsystem/SoC verificationFormal verification experience is a desirable but not must.Must have been a part of one or more ASIC/SoC tape outs.Knowledge of VHDL/VERILOG.SPECMAN knowledge is a desirable but not must. Qualifications BE / B.Tech / ME / M.Tech (Electronics and Communication) Additional Information 5-8 Legal Entity: Bosch Global Software Technologies Private Limited
Responsibilities
Responsible for the verification of SoCs, automotive ASICs, subsystems, and IPs using Metric-driven and Formal Verification methodologies. Tasks include developing verification environments from scratch, creating Verification IPs, and analyzing regression results.
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