CAD Front end and DFT flows Engineer at Advanced Micro Devices, Inc

Hyderabad, Telangana, India -

Full Time

Start Date

Immediate

Expiry Date

13 Aug, 26

Salary

0.0

Posted On

15 May, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Front-end RTL Flows, DFT Methodologies, Synthesis, Lint, CDC, RDC, Formal Verification, STA, Python, Perl, Tcl, Automation, Digital Design, FPGA-SoC, 3nm/2nm Technology Nodes

Industry

Semiconductor Manufacturing

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: This position for a CAD Engineer will be critical to shaping our latest AMD FPGA products. In this role it requires interfacing with design teams across the globe and owning development & support for next generation front-end RTL flows, synthesis and DFT flows for 3nm and 2nm technology nodes and working closely with EDA vendors to identify innovative solutions and track methodology issues. THE PERSON: You have a passion for modern, complex architecture, digital design, and DFT concepts in general. You quickly ramp up on new tools and methodologies, and you're comfortable working on a small, highly capable team where you can take on significant responsibility. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems KEY RESPONSIBILITIES: Responsible for developing Front-end Design, synthesis and DFT methodologies for various designs at advanced technology nodes Collaborate with the design team to drive continuous improvements in DFT and front-end design methodologies, ensuring top-quality RTL and Netlist across areas different areas such as Lint, CDC, formal verification, DFT coverage. Script out utilities to automate different pieces of the flows Enhance and develop flows that enable for AMD's next-generation monolithic and stacked FPGA-SoC product families Leverage corporate AI systems to increase productivity and streamline workflows. PREFERRED EXPERIENCE: Hands on experience in front end and DFT flows Hands on experience in industry standard Design tools such as Lint, CDC, RDC tools and DFT tools Hands on experience with any of synthesis, STA is a plus Good knowledge on scripting languages like Python, PERL, TCL and strong debug capabilities CAD and Automation mindset ACADEMIC CREDENTIALS: Master’s/Bachelor’s Degree in Electronics or Computer Engineering. 4-6 years of experience in CAD flow and methodology development on advanced technology nodes. Location: AMD Hyderabad or Bangalore #LI-SR4 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Responsibilities

Develop and support front-end design, synthesis, and DFT methodologies for next-generation FPGA products at advanced technology nodes. Collaborate with design teams and EDA vendors to automate flows and ensure high-quality RTL and netlists.