Chip Design Director at TriEye

Tel-Aviv, Tel-Aviv District, Israel -

Full Time

Start Date

Immediate

Expiry Date

18 Jul, 26

Salary

0.0

Posted On

19 Apr, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Chip architecture, ASIC design, Analog design, Digital design, Verification, Tape-out, Semiconductor design, CMOS, SWIR sensing, Nanophotonics, Project management, Vendor management, Productization, Silicon solutions, Layout

Industry

Semiconductor Manufacturing

Description

TriEye is the pioneer of SWIR sensing technology. Built on cutting-edge nanophotonics research, TriEye develops breakthrough CMOS-based SWIR sensors, compact SWIR lasers, and complete electro-optical systems. Our integrated approach unlocks performance levels previously achievable only with expensive, niche technologies. By combining advanced semiconductor design, proprietary illumination sources, and system-level innovation, TriEye is transforming what’s possible in sensing across automotive, defense, robotics, industrial, and emerging consumer applications. We are redefining the industry with scalable, cost-effective products that bring SWIR capabilities to mass-market adoption. We are looking for exceptional talent to join our R&D team as a Director of Chip Design, to lead the architecture, development, and optimization of our next-generation sensors. Your Day to Day Lead chip architecture and overall design, translating system and product requirements into robust silicon solutions, while directly managing a multidisciplinary team across Analog design and layout, Digital design, and verification Oversee end-to-end chip development, from definition through integration and tape-out, including planning, scheduling, budgeting, fab interface, and coordination of subcontractors Work closely with Product and System teams to define chip features and high-level architecture, ensuring alignment between system behavior and silicon implementation Manage external engagements, including IP definition and procurement, as well as outsourced development—from vendor selection and SOW definition through execution Collaborate closely with Product Engineering, with the opportunity to take broader ownership of productization as programs progress Requirements B.Sc or MS.c in the field of Electrical Engineering, Computer Engineering, or equivalent Proven experience of at least 7 years in managing multidisciplinary ASIC design teams, leading the teams from design inception through tape-outs to production Chip design background – understanding of design flows, methodologies, design tools, and FAB basics. Hands-on experience in Analog design and/or Digital design Image sensors background (preferred) Preferred Qualifications null Why should you be a TriEyoneer? Be at the forefront of a new sensing paradigm SWIR is moving from niche to mainstream. You’ll join at the inflection point, where proven technology meets real market demand at scale. Build what others can’t Work on breakthrough hardware and systems, from first principles to real-world deployment. This is deep-tech, end-to-end. Join at the right moment TriEye is entering a major growth phase, backed by leading investors and global partners across defense, robotics, and beyond. Grow with exceptional people Be part of a multidisciplinary team that values ownership, learning, and pushing technical boundaries together. Enjoy the journey Modern offices in Tel Aviv with easy access to public transport, plus a competitive benefits package including gym, parking, Cibus, generous vacation, and team events. General statement TriEye is an equal-opportunity employer. Qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or protected veteran status.

Responsibilities

Lead the architecture, development, and optimization of next-generation sensors while managing a multidisciplinary team. Oversee the end-to-end chip development process from definition through integration and tape-out.