Chip Level Integration Engineer (M, F, D) at Apple

Munich, Bavaria, Germany -

Full Time

Start Date

Immediate

Expiry Date

09 Mar, 26

Salary

0.0

Posted On

09 Dec, 25

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Chip Design, Integration Engineering, FE Design Tools, Methodologies, Low Power Design, Hierarchical Design, Top-Down Design, Social Skills, Collaboration, Scripting, Ad-Hoc Design Tasks, Quick Learning

Industry

Computers and Electronics Manufacturing

Description

Apple is a place where extraordinary people gather to do their best work. Together, we craft products and experiences people once couldn't have imagined — and now can't imagine living without. If you're motivated by the idea of making a real impact and joining a team where we pride ourselves on being one of the world's most diverse and inclusive companies, a career with Apple might be your dream job. The SoC Integration team is looking for an experienced Integration Engineer. You will play a critical role by taking part in the Design and Integration as a focal point for chip level design flows and development, working in sophisticated technologies and interacting closely with multiple teams. Your unique perspective and experience will be a valuable addition to our diverse and inclusive teams. The ability to drive decisions through consensus and inspire change is crucial to succeed in this role. DESCRIPTION You will play a critical role by taking part in the Design and Integration as a focal point for chip level design flows and development, working in sophisticated technologies and interacting closely with multiple teams. Your unique perspective and experience will be a valuable addition to our diverse and inclusive teams. The ability to drive decisions through consensus and inspire change is crucial to succeed in this role. MINIMUM QUALIFICATIONS B.Sc / M.Sc in Electrical or Computer Engineering. Experience in chip design. Ability to fluently speak and write in English. PREFERRED QUALIFICATIONS Experience with FE design tools and methodologies, such as Lint, Synthesis, Logic Equivalence, Clock/reset cross-domain verification, and FV. Experience in defining and implementing low power design (UPF) - advantage. Familiarity with hierarchical design approach and top-down design. Good social skills and ability to work collaboratively with other teams. Ability to develop scripts to facilitate ad-hoc design tasks. Quick learning of flows and methods.

Responsibilities

You will play a critical role in the Design and Integration as a focal point for chip level design flows and development. This involves working in sophisticated technologies and interacting closely with multiple teams.