CPU Core Physical Design Engineer at Advanced Micro Devices, Inc

Boxborough, Massachusetts, United States -

Full Time

Start Date

Immediate

Expiry Date

06 Aug, 26

Salary

0.0

Posted On

08 May, 26

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Digital Logic Design, Physical Implementation, Place-and-Route, Synthesis, Static Timing Analysis, Power Analysis, Electrical Reliability Analysis, Computer Architecture, Perl, Python, CAD Tools, Signal Integrity, IR Drop Analysis, Electromigration Analysis, Gate-level Design, Timing Optimization

Industry

Semiconductor Manufacturing

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE Join the team designing AMD’s Zen high-performance processors. In this role, you’ll contribute to high-speed logic design and physical implementation of a microprocessor core, collaborating with engineers across the design flow to meet timing, power, and reliability goals. THE PERSON You enjoy solving complex logic design problems and are curious about what goes into a high-end microprocessor. You communicate clearly, collaborate well across disciplines, and are comfortable learning new tools and methodologies as you grow in the role. KEY RESPONSIBILITIES Perform logic design and optimization. Execute custom place-and-route and physical implementation. Run synthesis and support implementation flows. Drive timing optimization and design closure using EDA tool flows (including static timing analysis). Analyze and address power, electrical, and reliability considerations (e.g., IR drop, electromigration, coupling/noise) as needed. Collaborate with cross-functional partners to bring designs from concept through silicon. PREFERRED EXPERIENCE Digital logic design and optimization. Gate-level design experience. Timing analysis and optimization. Electrical reliability analysis. Knowledge of computer architecture. Experience with scripting languages (e.g., Perl, Python). Experience with industry CAD tools related to timing analysis, circuit analysis, and place-and-route. Familiarity with circuit and signal integrity topics (e.g., signal coupling/noise, IR drop, electromigration). ACADEMIC CREDENTIALS Bachelor’s or master’s degree in computer engineering or electrical engineering, or equivalent practical experience. This role is not eligible for visa sponsorship. #LI-DP1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Responsibilities

The role involves performing logic design, optimization, and physical implementation of high-performance microprocessor cores. Responsibilities include driving timing closure and addressing power and reliability considerations using EDA tool flows.