CPU Implementation Silicon Correlation Engineer at Apple

Santa Clara, California, United States -

Full Time

Start Date

Immediate

Expiry Date

06 Feb, 26

Salary

0.0

Posted On

08 Nov, 25

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Data Analysis, Silicon Correlation, Chip Tapeout, STA, Spice Simulations, Data Parsing, CPU Design, Std Cell Architecture, Device Technology, Spice Models, ATPG Pattern Framework, PNR Tool Flows, TCL, Perl, Python, Cross-Functional Collaboration

Industry

Computers and Electronics Manufacturing

Description

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want join us in these pursuits? Join us to help deliver the next groundbreaking Apple product! As we continue to push CPU performance and efficiency in the most advanced technology nodes validating and correlating our physical design point to silicon is of utmost importance. We want to ensure that the frequencies, voltages, and power we target in pre-silicon design are realizable on silicon and in the final products we ship to our customers. In this role as a CPU Implementation Silicon Correlation Engineer, you will be performing data analysis using pre-silicon and post-silicon data to establish silicon correlation to design targets. DESCRIPTION In this role as a CPU Implementation Silicon Correlation Engineer, you will be working on the following: • Obtain process-related silicon measurement data from product and technology team • Analyze pre-silicon timing runs to comprehend margins and relate it to measured silicon parameters • Work with post-silicon teams in evaluating ROI of design and methodology features •Analyze post-silicon speed debug data to help identify and root cause failing paths MINIMUM QUALIFICATIONS Minimum BS and 10+ years of relevant industry experience Experience with a chip tapeout of a custom or PnR block Experience with STA Experience running spice simulations and analysis Experience with data parsing, analysis, and representation/plotting skills PREFERRED QUALIFICATIONS Chip design experience including experience in CPU design Good understanding of std cell architecture and design Working knowledge of device technology and spice models Familiarity with ATPG pattern framework Awareness of PNR tool flows Language proficiency in TCL, Perl, and Python Ability to work with cross-functional teams spanning pre-silicon design, technology and post-silicon debug

Responsibilities

As a CPU Implementation Silicon Correlation Engineer, you will analyze pre-silicon and post-silicon data to ensure that design targets are met. You will work with teams to evaluate design methodologies and identify issues in silicon performance.