CPU Memory Subsystem Verification Engineer at Apple
Santa Clara, CA 95050, USA -
Full Time


Start Date

Immediate

Expiry Date

12 Nov, 25

Salary

190900.0

Posted On

12 Aug, 25

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

Emulation, Logic Design, Architecture, Communication Skills, Assertions

Industry

Information Technology/IT

Description

Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there’s no telling what you could accomplish. Dynamic, amazing people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product. Do you love working on challenges that no one has solved yet? As a member of our dynamic group, you will have the unparalleled and phenomenal opportunity to craft upcoming products that will delight and support millions of Apple’s customers every single day.

DESCRIPTION

Do you have an uncommon desire to seek out and solve exceedingly difficult challenges rather than the easy ones? Do you believe that truly valuable and meaningful accomplishments are the result of pushing the limits of perseverance? Do you believe that a world-class team with relentless drive can surpass even their own high expectations? We do! But we also realize this job isn’t for everyone. What we do isn’t easy but you don’t take the easy path. In this highly visible role, you will be at the center of a chip design effort collaborating with all fields, with a critical impact on getting functional products to millions of customers quickly. As a memory sub-system verification engineer, you will have the responsibilities as follows: - Play a meaningful role in end-to-end verification of memory subsystem by developing an in-depth understanding of cache coherence protocols and functioning of various units in CPU/GPU/SOC that are relevant to memory subsystem verification. These units include Load-Store unit, different levels of caches, bus interface units, memory controller, etc. - Develop verification environment which can be used in both simulation and emulation - Develop synthesizable transactors and test benches and support verification hooks for verifying memory subsystem functionality and CPU/SOC features - Develop unit level stimulus as well as full chip assembly programs to verify memory subsystem - Develop verification IPs that can be shown by Apple teams worldwide - Work closely with CPU/SOC/GPU RTL design teams and understand the specification in detail for developing verification strategy for the above mentioned environment taking system level considerations into account. - Develop coverage monitors and accomplish coverage goals - Debug failures in both pre and post silicon environments, root-cause problems, and propose design changes to address issues - Develop abstract end-to-end checks to verify CPU-SOC memory subsystem interaction and coherence protocols. - Use novel techniques such as formal verification, emulation/FPGA technology, as well as industry standard tools and languages to verify memory subsystem

MINIMUM QUALIFICATIONS

  • BS, MS, or Ph.D. in Computer/Electrical Engineering is required.

PREFERRED QUALIFICATIONS

  • The ideal candidate should have 2+ years of processor verification experience.


    • In-depth knowledge of digital logic design, CPU and SOC architecture/micro-architecture and memory subsystem

    • Strong programming (C/C++, Verilog, Scripting), Software optimization and performance improvement skills.
    • Experience in unit and full chip level test benches
    • Experience in developing testplans, assertions and developing stimulus
    • Should be an extraordinary teammate with excellent communication skills, be able to work independently on the verification efforts for a block/area of the design.
    • Experience with emulation and developing synthesizable transactors is a plus

    How To Apply:

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    Responsibilities

    Please refer the Job description for details

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