CPU Physical Design Engineer at IC Resources
London Area, London - England, United Kingdom -
Full Time


Start Date

Immediate

Expiry Date

28 Jan, 27

Salary

60000.0

Posted On

30 Oct, 26

Experience

9 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Yes

Skills

Industry

Information Services

Description

About the job

Spectrum IT Recruitment is working with an innovative technology business developing advanced hardware for next-generation wireless and satellite communications. They’re looking for Senior Design Engineers with a main focus on RTL design using Verilog, SystemVerilog or VHDL.

The RoleYou’ll develop digital hardware for high-performance communications systems, working across FPGA and ASIC design. Collaborating with algorithm, architecture and verification teams, you’ll help translate requirements into reliable, efficient hardware implementations.

  • Key ResponsibilitiesTranslate system and algorithm requirements into micro-architectures for RTL implementation.
  • Develop FPGA and ASIC designs using Verilog, SystemVerilog or VHDL.
  • Create testbenches and use simulation tools to validate designs.
  • Deploy designs onto FPGA development platforms for validation and integration.
  • Contribute to timing, resource and power optimisation.
  • Collaborate across design, verification and physical implementation.
  • Produce technical documentation and contribute to improvements in engineering processes.


  • Skills and ExperienceThe key requirement is hands-on RTL design experience using at least one of Verilog, SystemVerilog or VHDL.We’re interested in candidates with:Relevant FPGA or ASIC digital design experience.
  • Knowledge of simulation and synthesis using EDA tools.
  • An understanding of timing analysis and hardware resource optimisation.
  • Strong problem-solving skills and the ability to collaborate across technical teams.
  • The ability to produce clear design and verification documentation.


  • Desirable ExperienceAny experience with the following would be beneficial:Communications or digital signal processing algorithms.
  • AMBA bus protocols.
  • UVM verification.
  • C++ or SystemC modelling.
  • High-speed interfaces such as PCIe or JESD.
  • Python scripting.
  • AMD FPGAs and associated tools, or ASIC backend tools.



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Responsibilities
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