CPU Physical Electrical Analysis Engineer at Apple

Austin, Texas, United States -

Full Time

Start Date

Immediate

Expiry Date

21 Jan, 26

Salary

0.0

Posted On

23 Oct, 25

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Power Delivery, Electromigration, IR Drop Analysis, Scripting, SAPR, EMIR Flow Automation, VLSI Designs, PNR Design Flow, Deep Sub-Micron Technology, Design Fixes, Apache Redhawk, Cadence Voltus, Physical Construction, Verification, STA, Communication Skills

Industry

Computers and Electronics Manufacturing

Description

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want join us in these pursuits? Join us to help deliver the next groundbreaking Apple product! As a CPU Physical Electrical Analysis Engineer, you will be driving the block and top level analysis of high performance processor projects in the EMIR/SIGEM/Reliability spheres. DESCRIPTION • Drive block and top-level EMIR/electrical verification closure • Work on power grid design, construction, and implementation using existing infrastructures and where necessary, creating custom solutions in PNR tool environment • Work multi-functionally with CAD/EDA vendors to ensure fidelity of analysis results with methodology teams to cover unique use cases, with implementation teams to drive design and sign-off closure, and with the SOC level teams to meet IP delivery quality and schedule MINIMUM QUALIFICATIONS Minimum BS and 10+ years of relevant industry experience Experience with silicon level power delivery, electromigration, and IR drop analysis Experience with scripting of SAPR or EMIR flow automation for the efficient processing of large scale design and analysis data, debugging of issues, and isolating design sensitivities PREFERRED QUALIFICATIONS Experience implementing high-performance and low-power VLSI designs Experience with SAPR/PNR design flow infrastructure Understanding of challenges related to latest deep sub-micron technology Produce impactful design fixes and automate wherever possible, spanning multiple tool domains in physical construction and analysis Working knowledge of industry standard tools like Apache Redhawk and Cadence Voltus as well as PNR implementation, layout tools, verification, and STA Strong communication and presentation skills to regularly summarize the state of the design and drive design convergence across multiple blocks and teams in a timely fashion

Responsibilities

Drive block and top-level EMIR/electrical verification closure and work on power grid design and implementation. Collaborate with multi-functional teams to ensure design quality and schedule adherence.