Design Engineer for SOC Group at Apple

, , Israel -

Full Time

Start Date

Immediate

Expiry Date

13 Jan, 26

Salary

0.0

Posted On

15 Oct, 25

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Digital Design, SoC, Power Management, Micro-Architecture, RTL Coding, Block Level Simulations, Synthesis, Verification Methodologies, Verilog, System Verilog, Scripting, Python, Perl, TCL

Industry

Computers and Electronics Manufacturing

Description

In this role you will be familiar with cutting edge power management techniques including power management ICs control schemes, Chip power state transitions, SoC boot process and HW security solutions. You will define uArch spec, implement HW including RTL and UPF coding, synthesize the digital design to the latest process nodes and participate in the implementation process. Your responsibilities in this role likely to include: Micro-architecture definitions at the unit level RTL coding, block level simulations and synthesis Work closely with verification team on block/top level to ensure timely delivery of quality designs Work closely with physical design team to optimize the design and to meet the targets set for a certain unit (area, timing, and power) The position is relevant to all Apple sites: HRZ, Haifa, JRZ DESCRIPTION Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products very quickly. Do you want to bring passion and dedication to your job? There's no telling what you could accomplish at Apple.Do you want to join us to help deliver the next groundbreaking Apple products? The Apple SoC design team is looking for an experienced engineer to develop Apple's compute SoCs power management system. Role expectations include working with partner Design teams, Physical design, verification, Platform Architecture and Software teams to define the power system micro architecture, implement the required HW and integrate it to a complex multi chip system. MINIMUM QUALIFICATIONS 3+ years of experience in digital design (preferably in SoC) Familiar with advanced design practices (clock/voltage domain crossing, low power design and DFT) - Advantage Familiar with various chip development tools (e.g. lint, synthesis, STA) Familiar with verification methodologies Strong Verilog/System Verilog skills Experienced with scripting using common languages (e.g. Python, Perl, TCL) PREFERRED QUALIFICATIONS BS.c/ MS.c in EE/ CE

Responsibilities

You will define micro-architecture specifications, implement hardware including RTL and UPF coding, and participate in the implementation process. Responsibilities include working closely with verification and physical design teams to ensure quality designs and meet targets for area, timing, and power.