Design Engineer II at Cadence Design Systems

Bengaluru, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

13 Jul, 26

Salary

0.0

Posted On

14 Apr, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Pre-silicon emulation, Verification, Hardware design, Subsystem board design, Firmware development, PCIe, CXL, UCIe, USB, Ethernet, Oscilloscopes, Bit error rate testers, Protocol exercisers, Analyzers, FPGA design, Schematic design

Industry

Software Development

Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day. JOB Responsilibilities: BE/BTECH/ME/MTECH The responsibility primarily entails leading pre and post Silicon Subsystem Prototyping, Validation and Hardware Design for Cadence High Speed SERDES Test chips. What we do : • Pre Silicon emulation and Verification of System in NCSIM/Palladium/other Simulators. • Hardware and Subsystem Board Design for all the Projects. (HW/SW infrastructure designed within team) • Prototyping and Firmware Development for our High Speed Serdes like PCIe, CXL , UCIe, USB ,ethernet. • Lead the Bring up, Debug, Compliance efforts and System level Characterization all the way to report release. • Engage in interop and Customer Debug. What you'll gain : • Chance to work on cutting edge SERDES IP's from Cadence. Refer to Cadence Website for more details on our SERDES IP's. • Tremendous learning curve on SERDES PHY, Controllers, Protocol and System integration. • Hardware and Subsystem design expertise. • Experience in deploying and debugging your Solutions in different customer environments. What we are looking for : Minimum Qualifications: • 2+ years (with Btech) or 5 years (with Mtech) experience in Post-Silicon PHY, Systems Interop and Compliance testing. • 2-3 years of management experience leading/mentoring a small team of engineers • Physical Layer and Protocol layer experience on AT LEAST ONE High speed SERDES on PCIe/CXL/UCIe/Ethernet. • Debug skills and Experience in using lab equipment such as Oscilloscopes, Bit Error Rate Testers, Protocol Exercisers, Analyzers. Preferred Qualifications: • Experience leading System testing efforts for SERDES solutions. • Experience in PCIe/UCIe LTSSM states is a plus. • 1-2 years of experience in FPGA Design and Schematic design. • 1-2 years of IP/SoC Physical Layer Electrical Validation experience is a plus. • Familiarity with Verilog RTL coding for FPGA, python,C/C++ • Good communication skills Seasoned Systems Validation engineer who can lead SERDES projects (PCIe/CXL/UCIe) and mentor Juniors We’re doing work that matters. Help us solve what others can’t. Additional Jobs Equal Employment Opportunity Policy: Cadence is committed to equal employment opportunity throughout all levels of the organization. Read the policy(opens in a new tab) We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact staffing@cadence.com. Privacy Policy: Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab). E-Verify Cadence participates in the E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64K) Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

Responsibilities

The role involves leading pre and post-silicon subsystem prototyping, validation, and hardware design for high-speed SERDES test chips. Responsibilities also include managing bring-up, debug, compliance efforts, and system-level characterization.