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Design Verification Engineer at Apple
, , Israel -
Full Time

Start Date

Immediate

Expiry Date

18 Jan, 26

Salary

0.0

Posted On

20 Oct, 25

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

SoC Verification, IP Verification, SoC Architecture, Verification Flows, Coverage Driven, Formal Methods, SystemVerilog, UVM, Verification Infrastructure Development, Storage IPs, Control Oriented Design, Scripting, Programming, Perl, Python, C++

Industry

Computers and Electronics Manufacturing

Description
In this visible role, you will be responsible for taking part of a SoC verification process of a large scale SoC. You will develop verification test plans, tools, test benches, protocol monitors, and high-coverage stimulus vectors. Apply advanced techniques to achieve verification with the highest quality, productivity, and time-to-market. You will work closely with the design team to ensure timely delivery of quality designs. Working with methods to accelerate verification time. The position is relevant to all Apple sites: Herzliya, Haifa and Jerusalem DESCRIPTION Imagine what you could do here. At Apple, new ideas have a way of becoming great products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices - strengthening our dedication to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple products. MINIMUM QUALIFICATIONS 5+ years of experience in SoC or IP verification Advanced knowledge of SoC architecture/design, in-depth knowledge of verification flows and broad system view Expected to have a deep understanding and shown experience in advanced verification processes, including coverage driven and formal methods Extensive experience with SystemVerilog and UVM Experience with verification infrastructure development Knowledge of storage IPs and control oriented design - an advantage Knowledge of formal, hardware acceleration – an advantage Scripting and programming experience using several of the following: Perl, Python, Verilog, SystemVerilog, C, C++, and TCL PREFERRED QUALIFICATIONS B.Sc / M.Sc in Electrical or Computer Engineering
Responsibilities
You will be responsible for taking part in the SoC verification process of a large scale SoC. You will develop verification test plans, tools, test benches, protocol monitors, and high-coverage stimulus vectors.