Start Date
Immediate
Expiry Date
10 Jan, 26
Salary
0.0
Posted On
12 Oct, 25
Experience
0 year(s) or above
Remote Job
Yes
Telecommute
Yes
Sponsor Visa
No
Skills
Design Verification, System Verilog, UVM, Python, C++, Object-Oriented Programming, Digital Logic, Problem-Solving, Collaboration, Verification Test Plan, Coverage Analysis, Scripting Languages, Simulation Debugging, Protocol Implementation, Feature Verification
Industry
Semiconductor Manufacturing