Design Verification Intern (CCS) at Marvell Technology

Ho Chi Minh City, , Vietnam -

Full Time

Start Date

Immediate

Expiry Date

04 Apr, 26

Salary

0.0

Posted On

04 Jan, 26

Experience

0 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Design Verification, Test Plan Development, Verilog, SystemVerilog, UVM, C Language, Functional Coverage, Debugging, Problem-Solving, Communication, Linux Environment

Industry

Semiconductor Manufacturing

Description

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell is a leading provider of innovative storage technologies, including ultra-fast read channels, high-performance processors, leading edge transceivers, highly efficient analog designs, and powerful cryptographic engines. These solutions address all segments of the hard disk drive (HDD) and solid-state drive (SSD) electronics markets. Many of the same technologies have been utilized in Marvell storage system solutions products, powering PCs, servers, cloud, and enterprise systems. This internship position will work on Cloud Compute and Storage product lines. This is more than a typical internship—it’s a launchpad of your career as you are expected to not only learn and develop your technical competencies, but also integrate into Marvell's core behaviors and working culture that drives innovation and leading innovation in the industry. You’ll gain hands-on experience, receive mentorship from industry leaders, and contribute to real projects that drive Marvell’s product and R&D roadmap. What You Can Expect Develop design verification test plan to describe test scenarios following design specifications & standards. Develop testbench and tests using Verilog, SystemVerilog, UVM, and C language. Analyze functional and code coverage result. Enhance the coverage by randomization. Work with Digital Design team to test the design including defining testcases, debugging issues. Why This Internship Matters This internship will give you: Real project experience in one of the world’s leading chip design environments Exposure to Marvell’s core technologies, toolchains, and product workflows A mentorship path that could evolve into a full-time role or thesis opportunity Your Path Forward Many of our interns go on to become key contributors and technical leaders within Marvell. If you’re dreaming of a career that contributes to the significant growth of AI Accelerate Infrastructure—this is where you start. What We're Looking For BS/MS in Computer Science, Electrical Engineering or related fields. Knowledge of programing languages as C/C++, etc. Knowledge of HW design languages as Verilog/System-Verilog/VHDL, etc. Knowledge of Linux environment. Strong problem-solving skill Excellent communication skill Good in English skills Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Interview Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews. These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-HP1 Join our talent community to hear about company news, job openings and events. Join our Talent Community! Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Recruitment fraud is a well-known way that third parties try to get personal information or to steal money from you. Please review Marvell’s guidance here to learn more on how you can protect yourself.

Responsibilities

Develop design verification test plans and testbenches following design specifications. Collaborate with the Digital Design team to define test cases and debug issues.