DFT Engineer - New College Grad 2026 at NVIDIA
Shanghai, Shanghai, China -
Full Time


Start Date

Immediate

Expiry Date

23 Dec, 25

Salary

0.0

Posted On

24 Sep, 25

Experience

0 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

DFT, ASIC Design, Verification, Boundary Scan, MBIST, Scan, ATPG, Silicon Debug, Clock Design, Timing/STA, Place-n-Route, Power, Analytical Skills, Programming, Scripting, Communication

Industry

Herstellung von Computerhardware

Description
NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work , to amplify human imagination and intelligence. Make the choice to join us today. Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips. What you'll be doing: As a member in our team, you will be responsible for the design and implementation of state-of-the-art designs in test access mechanisms, memory BIST and scan compression. You'll be responsible for DFT verification environment setup, own DFT verification and bringup tasks for Clocks, Boundary Scan, Analog and MBIST, Scan, etc. You'll have chance to take the lead role for DFT verifications and bringup. In long term, you can be a DFT lead for verification or extend the expertise to DFT design or implementation. What we need to see: MS EE or PhD in DFT Good understanding on ASIC design and verification Hands on experience on at least one DFT feature: Boundary Scan, 1500, MBIST, Scan, ATPG Experience in silicon debug and bring-up on the ATE is a plus Good exposure to clock design, timing/STA, place-n-route or power is a plus Excellent analytical skills in verification and debug Strong programming and scripting skills in Perl, Python or Tcl desired Excellent written and oral communication skills in English with the curiosity to work on challenges NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people on the planet working for us. If you're creative and autonomous, we want to hear from you! NVIDIA is the world leader in accelerated computing. NVIDIA pioneered accelerated computing to tackle challenges no one else can solve. Our work in AI and digital twins is transforming the world's largest industries and profoundly impacting society. Learn more about NVIDIA.
Responsibilities
You will be responsible for the design and implementation of state-of-the-art designs in test access mechanisms, memory BIST, and scan compression. You will also set up the DFT verification environment and own verification and bringup tasks.
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