Responsibilities:

• Gain exposure to ASIC verification
• Contribute to verification effort of ongoing projects
• Work with diverse design and verification team members, local and remote 

Qualifications & Requirements: 

• Good academic standing
• Object oriented coding skills
• Strong problem-solving skills
• Knowledge of Verilog, SystemVerilog and UVM are assets.
• Knowledge of scripting languages such as Python and Tcl is an asset.
• English proficiency is required, including the ability to effectively communicate, collaborate, and perform job responsibilities in a professional business environment.