Digital Verification Engineer at Samsung Research and Development Center Israel

Tel Aviv, Tel-Aviv District, Israel -

Full Time

Start Date

Immediate

Expiry Date

26 Sep, 26

Salary

0.0

Posted On

28 Jun, 26

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

SystemVerilog, UVM, SVA, Python, Perl, Linux, Unix, Verification Planning, Code Coverage Analysis, ISP Algorithms, DMA, Security Blocks, MIPI, APB, AHB, Cadence Tools

Industry

Consumer Electronics

Description

Samsung R&D Center (SIRC) is looking for an experienced Verification Engineer to join our team. We are shaping the world of tomorrow, today—focusing beyond the horizon and driving exciting developments across key areas of technology. Samsung is creating a new era of continuous innovation, delivering value to society, and cultivating a workplace where our employees can maximize their talent, creativity, and passion. The Group The Verification Advanced Sensor Products team tackles the full verification flow—from block and IP level up to complex system-level integration. Our work directly powers the next generation of advanced imagery sensors for Mobile, AR/VR applications, and the Automotive sector. We dive deep into complex design flows, focusing heavily on Image Signal Processor (ISP) algorithms, system control blocks (such as DMAs), and security blocks. We are looking for engineers with a robust technical toolkit, high ambition, a strong motivation to learn, the ability to think outside the box, and the drive to bring disruptive technologies to life. What You Will Be Doing Own the full verification life cycle for complex digital designs, from initial verification planning and test execution through to rigorous coverage closure. Verify intricate ISP algorithm blocks, DMAs, and system security blocks that drive high-performance mobile, AR/VR, and automotive vision systems. Architect and develop robust verification environments from scratch. Implement SystemVerilog Assertions (SVA) and drive deep code coverage analysis (including nuanced control versus SOP modes). Debug complex tests and trace analysis alongside design engineers to deliver functionally pristine blocks and finalize regressions. Collaborate closely with cross-functional groups across active projects, including Design, Algorithm, Firmware, and Analog teams. Continuously expand your technical expertise by tackling increasingly complex verification challenges in a highly collaborative environment. Requirements BSc in Electrical/Electronic Engineering or Computer Engineering. 3+ years as a Verification Engineer, including at least one full chip or IP development cycle. High ambition, passion for solving complex hardware challenges, and a proven motivation to learn and adapt to new technologies. Hands-on expertise in SystemVerilog and UVM, including building environments from scratch. Proficiency with standard verification tools, simulators, and regression managers. Strong scripting skills in Python/Perl and experience with Linux/Unix environments. Methodical approach to verification planning, execution, and tracking. Experience using AI tools to accelerate verification, improve test generation, or optimize workflows. Advantages Experience verifying ISP algorithms, DMAs, or security blocks. Experience verifying standard protocols such as MIPI, APB, and AHB. Product background in Mobile, AR/VR, or Automotive domains. Experience with Cadence tools such as Xcelium, vManager, and Indago.

Responsibilities

Own the full verification life cycle for complex digital designs, including ISP algorithms, DMAs, and security blocks. Architect verification environments from scratch and collaborate with cross-functional teams to ensure functionally pristine blocks.