Quadric has created an innovative general purpose neural processing unit (GPNPU) architecture. Quadric’s co-optimized software and hardware is targeted to run neural network (NN) inference workloads in a wide variety of edge and endpoint devices, ranging from battery operated smart-sensor systems to high-performance automotive or autonomous vehicle systems. Unlike other NPUs or neural network accelerators in the industry today that can only accelerate a portion of a machine learning graph, the Quadric GPNPU executes both NN graph code and conventional C++ DSP and control code.

REQUIREMENTS

• Proven track record shipping a production SDK + compiler stack for an ML accelerator, GPU, or NPU.
• 5+ years experience in managing teams building compilers/ML systems, including 10+ years leading multi-disciplinary teams of ~30+ engineers.
• Excellent communication and stakeholder management; comfortable with customer escalations and field feedback loops.
• Data-driven program leadership: roadmap/OKRs, dependency/risk management, budget/headcount planning, and executive reporting.
• Demonstrated success hiring, coaching, and performance-managing managers and senior ICs; culture builder.
• Ability to translate product goals into compiler/KPI plans.
• Knowledge of graph compilers and kernel development: MLIR/TVM/StableHLO/HLO, LLVM, scheduling, codegen.
• Familiarity with quantization techniques: PTQ/QAT, per-tensor/per-channel schemes, symmetric/asymmetric, calibration datasets, accuracy/perf trade-offs.
• Strong C++ and Python fundamentals; performance profiling, vectorization, memory hierarchies, and concurrency.
• Nice to have: Experience integrating PyTorch backends (Dynamo/FX/Inductor/ONNX) and model export.

ROLE:

Reporting directly to the VP, Engineering, you will own the entire software team and will be responsible for execution on Quadric’s Chimera SDK (https://quadric.io/sdk/ ). Join us in our shared vision of shipping world class model optimization and compilers for AI inference where it matters most—on the factory floor, in the vehicle, across consumer devices and enterprise.

RESPONSIBILITIES

• Own end-to-end delivery of the software stack: SDK, graph compiler, kernel libraries, and developer tooling.
• Set technical direction and a multi-release roadmap for compiler, kernels, and SDK; align with silicon, architecture.
• Own the inference optimization stack (Quantization -> Compile -> Accelerated Performance) on Chimera architecture for Vision Models, LLMs, VLMs etc.
• Build and track execution plans, milestones, and KPIs (operator coverage, latency/throughput, accuracy deltas, compile times).
• Manage and mentor an engineering org (managers + ICs), grow the team, and develop leaders.
• Be hands-on for critical designs, reviews, and code—especially around IR design, codegen and kernels.
• Partner with customers and field teams to unblock POCs, prioritize the roadmap, and drive production wins.
• Establish quality bars and release engineering (CI/CD, testing, benchmarking, reproducible builds, docs, and samples).