Electrical Engineer, System Power Architect, Spectacles, L5 at Snap Inc.

Los Angeles, California, United States -

Full Time

Start Date

Immediate

Expiry Date

06 Feb, 26

Salary

284000.0

Posted On

08 Nov, 25

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

System Architecture, Power Management, Power Modeling, Load Characterization, Battery Modeling, Use Case Analysis, Cross-Functional Collaboration, Benchmarking, Validation, Power Optimization, Documentation, Integrated Circuit Design, Analog Design, Layout Strategies, Process Development, Communication Skills

Industry

Software Development

Description

Snap Inc is a technology company. We believe the camera presents the greatest opportunity to improve the way people live and communicate. Snap contributes to human progress by empowering people to express themselves, live in the moment, learn about the world, and have fun together. The Company’s three core products are Snapchat, a visual messaging app that enhances your relationships with friends, family, and the world; Lens Studio, an augmented reality platform that powers AR across Snapchat and other services; and its AR glasses, Spectacles. Spectacles is home to our hardware products with a world-class research & development team. We are focused on pushing the boundaries of what a camera can be, specifically overlaying computing on the real world. Next Generation Spectacles are our first pair of glasses that bring augmented reality to life. We’re looking for a System Power Architect Engineer, Devices to join Team Snap! Working from our hardware design centers in either Palo Alto or Santa Monica, CA, you’ll join the Snap Lab Hardware Engineering group responsible for the system power model. Our objective is to deliver on first-in-class consumer electronics hardware. What you’ll do: Power Model Ownership: Develop, maintain, and continuously improve a system-level power model that accurately predicts the power consumption of all hardware components and software activities across different operational states and use cases Load Characterization: Understand, characterize, and model power consumption for a wide array of system loads, including SoCs, CPUs, GPUs, memory, displays, wireless radios, sensors, actuators, and peripherals across varying functional modes Battery Modeling: Integrate battery model (ESR) into use-case based run time estimates as well as HW system DCR and grounding requirements Use Case Analysis: Collaborate with product and system architecture teams to define and model various use cases and translate into quantifiable power profiles Early Power Estimation: Extract and integrate pre-silicon power estimates and power breakdown data for chips under development, providing crucial feedback for architecture choices Cross-Functional Collaboration: Partner effectively with various submodule teams (e.g., silicon design, software, firmware, display, camera, wireless, audio, thermal) to gather accurate power consumption data, understand their respective power budgets, and identify optimization opportunities Benchmarking & Validation: Hand-on measurement of power and performance data from prototypes and compare it against model predictions across HW and SW features. Debug discrepancies, identify root causes, and refine models to improve accuracy and predictive capability. Power Optimization Guidance: Provide data-driven insights and recommendations to hardware and software teams for power reduction strategies, trade-offs, and design optimizations. Documentation: Create and maintain comprehensive documentation for power models, assumptions, methodologies, test procedures, and analysis reports. Knowledge, Skills & Abilities Knowledge of system architecture and subsystem metrics that impact performance for SOCs, Camera, Connectivity, Cellular, PMICs, and Battery. Knowledge of power management concepts and power delivery Excellent communication and collaboration skills Minimum Qualifications: 7+ years of post-Bachelor’s electrical engineering or hardware engineering experience; or Master’s degree in Electrical Engineering or a related field and 5+ year of post-grad electrical engineering experience; or 3+ years of post PhD in a relevant technical field. Preferred Qualifications: MS/PhD in Electrical Engineering or related field Demonstrated experience developing and shipping consumer electronic products at scale Experience with integrated circuit design such as VHDL or analog design Knowledge of layout strategies to meet Power Delivery Network impedance targets or in deriving power impedance masks Excellent process development and documentation skills If you have a disability or special need that requires accommodation, please don’t be shy and provide us some information. "Default Together" Policy at Snap: At Snap Inc. we believe that being together in person helps us build our culture faster, reinforce our values, and serve our community, customers and partners better through dynamic collaboration. To reflect this, we practice a “default together” approach and expect our team members to work in an office 4+ days per week. At Snap, we believe that having a team of diverse backgrounds and voices working together will enable us to create innovative products that improve the way people live and communicate. Snap is proud to be an equal opportunity employer, and committed to providing employment opportunities regardless of race, religious creed, color, national origin, ancestry, physical disability, mental disability, medical condition, genetic information, marital status, sex, gender, gender identity, gender expression, pregnancy, childbirth and breastfeeding, age, sexual orientation, military or veteran status, or any other protected classification, in accordance with applicable federal, state, and local laws. EOE, including disability/vets. We are an Equal Opportunity Employer and will consider qualified applicants with criminal histories in a manner consistent with applicable law (by example, the requirements of the San Francisco Fair Chance Ordinance and the Los Angeles Fair Chance Initiative for Hiring, where applicable). Our Benefits: Snap Inc. is its own community, so we’ve got your back! We do our best to make sure you and your loved ones have everything you need to be happy and healthy, on your own terms. Our benefits are built around your needs and include paid parental leave, comprehensive medical coverage, emotional and mental health support programs, and compensation packages that let you share in Snap’s long-term success! Compensation In the United States, work locations are assigned a pay zone which determines the salary range for the position. The successful candidate’s starting pay will be determined based on job-related skills, experience, qualifications, work location, and market conditions. The starting pay may be negotiable within the salary range for the position. These pay zones may be modified in the future. Zone A (CA, WA, NYC): The base salary range for this position is $190,000-$284,000 annually. Zone B: The base salary range for this position is $181,000-$270,000 annually. Zone C: The base salary range for this position is $162,000-$241,000 annually. This position is eligible for equity in the form of RSUs. A Decade of Snap: Learn about our origin story, values, mission, culture of innovation, and more. CitizenSnap: In our third annual CitizenSnap Report, we demonstrate progress towards our environmental, social, and governance (ESG) goals, and we lay out our plans looking forward. The DEI Innovation Summit: Watch highlights from the 2nd annual DEI Innovation Summit, which brings together thought leaders and DEI experts for a day of courageous conversations to enable bold action. Snap News: Stay up to date on the latest and greatest product and innovation news at Snap Applicant and Candidate Privacy Policy

Responsibilities

Develop and maintain a system-level power model to predict power consumption across hardware components and software activities. Collaborate with various teams to analyze use cases and provide insights for power optimization.