Electronic Engineer at Segula Technologies

Turin, Piedmont, Italy -

Full Time

Start Date

Immediate

Expiry Date

05 May, 26

Salary

0.0

Posted On

04 Feb, 26

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Python, SystemC, TLM, Virtual HW Controller, ASICs, Microcontroller, Virtual TestBench, CI Framework, C++, OOPS, STL, Data Structures, Algorithms, Verilog, Perl, Git

Industry

Engineering Services

Description

Company Description Join the world of the future in a fast growing international company! At SEGULA Technologies you will have the opportunity to work on exciting projects and help shaping the future within an engineering company which is at the heart of innovation. From 3D printing, augmented reality, connected vehicle to the factory of the future – new technologies are part of our 13,000 ingenious collaborators’ day-to-day life. Would you like to join in? Whether you are a student, young graduate, engineer or experienced project manager, at SEGULA Technologies you will find the opportunity to give a new meaning to your career. Skills development is a big part of SEGULA Technologies’ DNA, the company offers the possibility to move between sectors and positions, as well as attractive geographic mobility opportunities. SEGULA Technologies is always looking for new, ingenious, and daring talents worldwide to support all the major industrial actors within the automotive, aeronautics, energy, railway, naval, oil & gas and pharmaceutical sectors. Do you have a touch of genius? Take a new challenge and join us! For more information: https://www.segulatechnologies.com Job Description We are looking for a Virtual Prototyping Engineer to join our team and support an important customer. The candidate will be responsible for developing behavioural models in Python and/or SystemC along with TLM of a specific Virtual HW controller, including main microcontroller and all ASICs. The activity includes: Develop SystemC and/or Python behavioral models of ASICs according to data sheet Integrate ASICs Models and Microcontroller to create complete Virtual HW controller Develop and maintain Virtual TestBench/Instrumentation to be used to properly test Virtual HW controller Implementation of CI framework and maintenance of Virtual simulation nodes Qualifications Master degree in electronics, software engineering Good knowledge of Python Good knowledge of Microprocessors, Microcontrollers, SOC architecture, bus protocols etc. Proficiency in C++, OOPS, STL, data structures, algorithms and programming concepts. Experience in developing C++/SystemC, TLM based models for virtual platforms will be an added advantage Familiarity with hardware description languages (Eg: Verilog) will be an added advantage. Knowledge of the most common scripting languages like Perl, Tcl and version-control systems, with preference for Git; Fluent English, team working and good communication skills. Additional Information At SEGULA Technologies, diversity, equity and inclusion are at the core of our human resources policy. Our opportunities are open to everyone, regardless of gender, national origin or ethnicity, religious or sexual orientation, and disability. What we offer: CCNL Metalmeccanico contract Health insurance Meal vouchers or canteen Informal, stimulating, dynamic and inclusive environment Welfare programs Think Tank Attention to Work-Life Balance Continuous on the job training process Cross sector and cross-functional career paths Development of soft skills Consolidated partnerships with leading companies in the sector and the best universities If you are a curious, ambitious and proactive person… what are you waiting for? Join us. SEGULA Technologies believes in your potential! #italy #engineering #segulatechnologies #innovation Contrat/Pays: Unlimited Job family: Electronic - Software - Digital

Responsibilities

The candidate will be responsible for developing behavioral models in Python and/or SystemC along with TLM for a specific Virtual HW controller, which includes the main microcontroller and all ASICs. This activity also involves developing and maintaining a Virtual TestBench/Instrumentation for proper testing and implementing/maintaining the CI framework.