Emulation Engineer at Advanced Micro Devices, Inc

Bangalore, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

13 Sep, 26

Salary

0.0

Posted On

15 Jun, 26

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

SystemVerilog, UVM, Emulation Platforms, Python, Perl, TCL, RTL Design, Verilog, VHDL, SoC Architecture, Memory Protocols, Interface Standards, Debugging, Test Planning, Root Cause Analysis, Pre-silicon Verification

Industry

Semiconductor Manufacturing

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. Emulation Engineer THE ROLE: As an Emulation Verification Engineer in AMD’s Server SoC team, you’ll be at the forefront of validating next-generation server-class SoCs using advanced emulation platforms. Your mission: ensure AMD’s silicon hits the ground running—bug-free, high-performance, and server-grade reliable. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Bring-up and debug of large SoC designs on emulation platforms (e.g., Palladium, Veloce, Zebu). Develop and execute test plans to validate functionality, performance, and power on emulators. Create and integrate monitors, checkers, and assertions in SystemVerilog/UVM environments. Collaborate with cross-functional teams including RTL design, architecture, firmware, and post-silicon validation. Analyze failures, root-cause bugs, and drive fixes in pre-silicon environments. Maintain and enhance emulation infrastructure and workflows. PREFERRED EXPERIENCE: Strong experience in SystemVerilog, UVM, and emulation platforms. Proficiency in debugging tools and scripting languages like Python, Perl, or TCL. Familiarity with RTL design (Verilog/VHDL) and simulation tools. Solid understanding of SoC architecture, memory protocols, and interface standards. Familiarity with Gate level emulation in emulation platforms (e.g., Palladium, Veloce, Zebu). ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #L1-RG2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Responsibilities

The role involves bringing up and debugging large SoC designs on emulation platforms like Palladium, Veloce, and Zebu. The engineer will develop test plans and collaborate with cross-functional teams to ensure bug-free, high-performance server-grade silicon.