Emulation Engineer at MatX

Mountain View, California, United States -

Full Time

Start Date

Immediate

Expiry Date

21 Aug, 26

Salary

600000.0

Posted On

23 May, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

SoC Emulation, System-level Validation, Verilog, SystemVerilog, Python, C++, Rust, Tcl, Shell Scripting, Waveform Debugging, Hardware/Software Co-emulation, RTL Design, UVM, Bazel, LLM Tooling, PCIe/CXL

Industry

Computer Hardware Manufacturing

Description

What MatX Is Building MatX is on a mission to be the compute platform for AGI. We are developing vertically integrated full-stack solutions from silicon to systems including hardware and software to train and run the largest ML workloads for AGI. MatX is seeking silicon micro-architects and design engineers to join our team as we create best-in-class silicon for high-performance and sustainable GenAI. Successful candidates for these roles will be responsible for delivering performant and functionally accurate silicon for MatX products across compute, memory management. High-speed connectivity and other key technologies. We're hiring a Senior/Staff Emulation Engineer to build the infrastructure, flows, and debug methodology behind our advanced connectivity SoCs. The role sits in the Emulation team, but the impact is broader: you'll create reusable flows that span emulation, SoC simulation, firmware/software bring-up, and post-silicon validation. We're looking for a multi-disciplinary engineer with an out-of-the-box, can-do mindset — someone who sees a gap and builds the bridge, comfortable moving between RTL, software, tooling, system debug, and vendor flows. You don't need to be an expert in every area listed below. You do need a reuse-first mindset, strong software instincts, and the ability to learn quickly across boundaries. What You'll Do Here Define and execute emulation strategy and test plans for complex connectivity SoCs. Bring up and debug large-scale models on commercial emulation platforms such as Cadence Palladium, Zebu or Veloce. Integrate external components such as SpeedBridge and VirtualBridge adapters, Accelerated VIP, and memory models — for PCIe, HBM4, Ethernet, AXI/AMBA, JTAG, and (Q)SPI. And build custom transactors where needed. Develop HW/SW co-emulation and co-simulation flows using RTL, software/reference models (Rust, C/C++, SystemC), firmware, and software tests. Build reusable transactors, agents, stubs, bridges, checkers, and acceleration flows — including developing new transactors and agents from scratch when off-the-shelf options don't fit. Drive emulation speed-ups and resource utilization — compile-time reduction, partitioning, clocking strategy, regression scheduling, multi-user capacity, and waveform/trace management. Build automation for regression triage, debug, model usability, and engineering productivity. Go beyond prompting with AI — build practical LLM-based tooling for log analysis, waveform triage, debug assistance, and flow generation, including custom skills, agents, rules, and workflows that fit our engineering stack. Collaborate with architecture, RTL, DV, SoC, firmware, driver, kernel, validation, and EDA/vendor teams. Who You Are Strong hands-on experience with SoC emulation or system-level validation. Experience with at least one commercial emulation platform, such as Palladium. Working Verilog/SystemVerilog and waveform-debug skills — enough to develop a custom transactor or agent when needed (with or without AI assistance). Deep RTL design expertise is not required. Strong software and automation skills — Python plus one or more of C, C++, Rust, Tcl, or shell. Demonstrated ability to build tools and infrastructure, not just run existing flows. Strong system-level debug instincts spanning RTL, firmware, and software. Ability to work independently and across functional and team boundaries. Bonus Points If You Have UVM or hybrid SoC testbench development. Integrating cycle-accurate, software, or reference models into emulation/DV flows. Rust in verification or emulation flows (or strong interest in adopting it). Bazel or large-scale build/regression systems. Reusable stimulus across simulation, emulation, and post-silicon. AI/LLMs used to build real engineering tools — debug, triage, flow generation — beyond chat prompting. Connectivity SoCs, PCIe/CXL, Ethernet, DMA, HBM/memory subsystems, chiplets, or interconnect fabrics. Firmware or driver bring-up on emulation platforms. Scaling emulation or verification infrastructure across multiple projects or product lines. Compensation The US base salary for this full-time position is determined based on a variety of factors including role, experience, location, job related skills, and relevant education and training. Career length is only a guideline for compensation. Early Career - $120,000 - $275,000 + equity Mid Career - $175,000 - $450,000 + equity Senior Career - $275,000 - $600,000 + equity What We Offer A Stake in our success A cash/equity mix that fits your needs and option to do early exercise Health & Wellness Company subsidized Health, Dental, Vision, and Life insurance; Pre-tax Health Savings Accounts with generous company contribution (even if you don’t) Time To Recharge 4 weeks paid time off (accrued), 12 company holidays, and 3 weeks remote/flexible work per year Support to Parents Up to 12 weeks of paid parental leave, regardless of your path to parenthood Learning & Development $1,500 yearly towards your professional development e.g. conferences, courses, and other learning opportunities Team Connection Team Lunches, quarterly off-sites, and regular town halls Financial Wellbeing 401K and/or Roth IRA, with 5% company contribution, even if you don’t! Flexible Spending Accounts Pre-tax spend accounts for medical, dental/vision, dependent care, parking, and transit expenses Commute On Us For those commuting up to 1 hour, put your rideshare cost on our company card and reclaim the drive-time to get work done! MatX E[x]tras $50 per month to use on the perks you care about most Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi expense reimbursement As part of our dedication to the diversity of our team and our focus on creating an inviting and inclusive work experience, MatX is committed to a policy of Equal Employment Opportunity and will not discriminate against an applicant or employee on the basis of race, color, religion, creed, national origin or ancestry, sex, gender, gender identity, gender expression, sexual orientation, age, physical or mental disability, medical condition, marital/domestic partner status, military and veteran status, genetic information or any other legally recognized protected basis under federal, state or local laws, regulations or ordinances. All candidates must be authorized to work in the United States and work from our offices in Mountain View Tuesdays-Thursdays. This position requires access to information that is subject to U.S. export controls. This offer of employment is contingent upon the applicants capacity to perform job functions in compliance with U.S. export control laws without obtaining a license from U.S. export control authorities. MatX does not accept unsolicited resumes from individual recruiters or third-party recruiting agencies in response to job postings. No fee will be paid to third parties who submit unsolicited candidates directly to our hiring managers or People team and any resumes submitted are deemed to be the property of MatX.

Responsibilities

Define and execute emulation strategies and test plans for complex connectivity SoCs using platforms like Cadence Palladium. Develop HW/SW co-emulation flows and build automation tools for regression triage and debug productivity.