Emulation Verification Engineer (Japan Design Center) at Apple

Minato, , Japan -

Full Time

Start Date

Immediate

Expiry Date

18 Jan, 26

Salary

0.0

Posted On

20 Oct, 25

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Emulation, Verification, Mixed Signal SoCs, Debugging, Design Verification, System Verilog, Verilog, System Verilog Assertions, Scripting, Analytical Skills, Debug Skills, English Skills, C/C++ DPI, UVM, RTL, UVM Acceleration

Industry

Computers and Electronics Manufacturing

Description

Imagine what you could at Apple! New insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, experienced people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it. Are you passionate about changing the world? We have a critical impact on getting high quality functional products to millions of customers quickly. We are looking for you to join our emulation team focusing on the creation, deployment, and support of sophisticated emulation environments. In this highly visible role, you will be at the center of a chip design effort collaborating with all subject areas. Are you ready to help us deliver the next groundbreaking Apple products? DESCRIPTION As a member of Emulation verification team, you will play a key role in using Emulation for verification of mixed signal SoCs which has large digital and analog sections. The individual will be responsible for porting the design to Emulation platform with the help of the Emulation team and then delivering the verification plan. MINIMUM QUALIFICATIONS 5+ years of experience with bring up, debugging and verification in Emulation Good understanding of any Standard Emulator (Palladium, Veloce, Zebu) OR FPGA (Xilinx, Altera) flow Proven design verification skills Experience in writing Synthesize-able System Verilog/Verilog code and System Verilog assertions Experience on any Scripting (Perl/Python/TCL) Excellent analytical and debug skills Excellent oral and written English skills PREFERRED QUALIFICATIONS Experience with System Verilog verification environments including C/C++ DPI, UVM Understanding of the tool flow from RTL to Emulation Experience in UVM Acceleration

Responsibilities

As a member of the Emulation verification team, you will play a key role in using Emulation for verification of mixed signal SoCs. You will be responsible for porting the design to the Emulation platform and delivering the verification plan.