Key responsibilities include:

• Collaborate with cross functional teams to help define requirements, architecture, and design specifications
• Architect, Design, Implement, and maintain RTL IP and Digital systems using Verilog/SystemVerilog
• Design optimization with respect to performance, power, and area (PPA)
• Run and support simulation, synthesis, and timing analysis for RTL IP
• Work closely with verification engineers to define test strategies and support debug
• Participate in design and architecture reviews, contributing to technical discussions and trade off decisions
• Help improve workflows, tools, and methodologies to streamline IP development and integration
• Support embedded firmware development, debugging, and bring-up activities where needed

Core experience (important for the role):

• Experience with Verilog and/or SystemVerilog in a digital design environment
• Programming experience in one or more languages (e.g. C/C++, Python, TCL)
• Understanding of common on chip communication protocols such as SPI, I²C, or UART

Other areas that you would be exposed to in early years on the job:

• FPGA emulation or pre-silicon system validation experience
• Familiarity with Ethernet or networking concepts
• Exposure to design closure activities such as timing, power, or area optimization
• Exposure to microcontroller-based subsystems and related development tools
• Familiarity with a requirements driven design flowKnowledge of automotive or safety critical design flows (e.g. ISO26262)
• Awareness of security or encryption techniques used in embedded systems
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