FE CAD Engineer at Apple
Haifa, Haifa District, Israel -
Full Time


Start Date

Immediate

Expiry Date

26 Jan, 26

Salary

0.0

Posted On

28 Oct, 25

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

Electrical Engineering, Computer Engineering, Computer Science, Programming, Python, C/C++, RTL Design, Verilog, SystemVerilog, SoC Integration, EDA Tools, Debug Utilities, Automation, Performance Improvements, Documentation, User Training

Industry

Computers and Electronics Manufacturing

Description
Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple products. DESCRIPTION Develop and maintain internal EDA tools and frameworks for RTL assembly and connectivity checking. Implement efficient algorithms for hierarchical RTL construction, module binding, and interface consistency across complex SoCs. Build intelligent connectivity, visualization, and debug utilities. Collaborate with front-end design, DFT, and integration teams to align methodologies and define tool requirements. Drive automation and performance improvements, including runtime optimization and scalability across large designs. Support adoption, documentation, and user training for internal design teams. MINIMUM QUALIFICATIONS BSc/MSc in Electrical Engineering, Computer Engineering, or Computer Science 3+ years of experience in FE design or integration PREFERRED QUALIFICATIONS Good programming skills in Python and C/C++ Solid understanding of RTL design (Verilog/SystemVerilog) and SoC integration concepts
Responsibilities
Develop and maintain internal EDA tools and frameworks for RTL assembly and connectivity checking. Collaborate with front-end design, DFT, and integration teams to align methodologies and define tool requirements.
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