FE CPIE CPI Senior Engineer/Engineer at Micron Technology

, , Singapore -

Full Time

Start Date

Immediate

Expiry Date

09 Mar, 26

Salary

0.0

Posted On

09 Dec, 25

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Project Management, Process Integration, Data Analysis, Problem Solving, Communication Skills, Teamwork, Organizational Skills, Technical Expertise, Semiconductor Device Physics, Wafer Fabrication, Yield Optimization, Presentation Skills, Innovation, Customer Relationships, Attention to Detail, Multi-tasking

Industry

Semiconductor Manufacturing

Description

Promote worldwide synergy for improved benchmark performance and efficiency gains through global project management and execution, network BKM leveraging and enhancement, and business process creation and re-engineering. Define strategies to ensure that Packaging Technology and interaction with Front End manufacturing process are fully developed and qualified well ahead of any qualification of the product itself. Lead the PI Loop taskforce and/or team in network to address yield and quality challenges, optimize process flow in a timely manner to achieve BIC yield performance. Maintain and enhance domain knowledge and technical expertise, explore innovation opportunities with strategic thinking and systematic approach. Maintain a strong and open relationship with peer group and managers in other functional areas within central team and outside in areas such as Fab, TD, Product Engineering, GQ. Communicate and respond to issues in a timely manner. Help drive to fix the issue where necessary. Demonstrate ability to give effective presentations to both small and large groups on project updates and new initiative proposals. Periodically follow up with manager to ensure all type of goals are met and get assistance to remove obstacles. Bachelor's or Master's degree in Electrical Engineering, Microelectronics, Physics, Chemistry, Material Science Engineering or related field A minimum of 2 years of experience in Back-End-of-Line (BEOL) semiconductor processing or process integration is required Must be willing to travel as needed to support departmental goals, with an expected travel frequency of approximately 20-50% Knowledge in Semiconductor Device Physics, DRAM operations, wafer fabrication process flows, parametric/electrical test and probe yield. The experience on DRAM HPM, BEOL integration, advanced packaging and layout will be a plus to this job position. Good data analysis, troubleshoot, problem solving, reporting and presentation skills with a strong attention to detail. Good multi-tasking, verbal, and written communication skills. Strong interpersonal skills and customer/co-worker relationships. Successfully demonstrated teamwork skills with a strong focus on developing good team dynamics. Good organizational capabilities and ability to work effectively with minimal supervision. Intermediate to advanced PC skills including Microsoft Office. Ability to be flexible with job responsibilities and take the initiative to assume added responsibilities.

Responsibilities

Promote worldwide synergy for improved benchmark performance and efficiency gains through global project management and execution. Lead the PI Loop taskforce to address yield and quality challenges while optimizing process flow.