Fellow FPGA Design Engineer at Advanced Micro Devices, Inc

George Town, Penang, Malaysia -

Full Time

Start Date

Immediate

Expiry Date

09 Apr, 26

Salary

0.0

Posted On

09 Jan, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Programmable Logic Fundamentals, Next Generation Process, Packaging Technologies, Binning, Circuit Margins, Regulators, SRAM Design, LUTs, NOCs, Clocking, Circuit Techniques, High Performance, Low Power Operations, Industrial Requirements, Automotive FUSA Requirements, Design For Manufacturing, Design For Debug

Industry

Semiconductor Manufacturing

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: As a fellow design engineer in our FPD team, you will be responsible for leading and optimizing the Fabric PPAC in the Adaptive & Embedded Computing Group (AECG). You will be driving new ideas and capabilities in the programmable fabric in current and future products. You will be leading the evaluation of future architectures by closing working with Architecture and Manufacturing teams. You will enable test chip designs and provide technical direction for skilled design engineers to help evaluate and realize key IP and technologies. You will be reviewing IP designs for quality, performance, power, and cost. Additionally, you will interact with the various Silicon development teams including digital and analog circuit designers, custom layout designers, physical designers, integration teams, and sign-off teams. THE PERSON: A successful candidate will work with senior silicon design engineers, architects, and micro-architects of the fabric team. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills. KEY RESPONSIBLITIES: Execute FPD team supporting Fabric research and development Enable new capabilities in the FPGA fabric to improve PPAC Evaluate key new features in the fabric with deep understanding of software capabilities Design Reviews to reduce product risk, improve PPAC and schedule Evaluate and develop yield improvement techniques Understand product roadmaps and enable new foundry technologies Leverage and deploy AMD solutions in the fabric PREFERRED EXPERIENCE: Programmable logic fundamentals Next generation process and packaging technologies Binning and circuit margins, including VID, Aging Regulators, SRAM design, LUTs, NOCs, Clocking Circuit techniques for high performance and low power operations Industrial and automotive FUSA requirements Design for Manufacturing and Design for Debug Micro-architecture of dense, repeating structures Strong written and verbal communication skills ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering. LOCATION: Penang, Malaysia #LI-FY #LI-Hybrid Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Responsibilities

The Fellow FPGA Design Engineer will lead and optimize the Fabric PPAC in the Adaptive & Embedded Computing Group, driving new ideas and capabilities in programmable fabric. They will evaluate future architectures and provide technical direction for design engineers.