REQUIREMENTS

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• Thorough knowledge of CPU or AI accelerator design work experience in one or more of the following areas:

• In-depth knowledge of IEEE-754, and experience in optimizing FMA operations.
• Creativity in designing various implementation methods to balance performance, power, and area when dealing with both integer and floating point operations for high performance, energy efficient components.
• Expertise in coding complex mathematical functions (such as logarithms, exponentials, etc.) at a very fine level of precision using C or other high-level programming languages.
• Working knowledge of Hector, c2rtl, or similar tools used for formal verification.
• Understanding the algorithms used in common ALUs like multipliers and the tradeoff between area and power.
• Knowledge of System Verilog
• Experience with simulators and waveform debugging tools
• Knowledge of logic design principles along with timing and power implications
• Understanding of low power microarchitecture techniques
• Understanding of high performance techniques and trade-offs in a CPU microarchitecture
• Experience in C or C++ programming

EDUCATION AND EXPERIENCE

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• PhD, Master’s Degree or Bachelor’s Degree in technical subject area.

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• As a Floating Point & Logic Design Engineer, you will own or participate in the following:

• Microarchitecture development and specification - from early high-level architectural exploration through micro architectural research and arriving at a detailed specification
• Development, assessment, and refinement of RTL design to target power, performance, area, and timing goals
• Design delivery - work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and power
• Validation - support test bench development and simulation for functional and performance verification
• Performance exploration and correlation - explore high performance strategies and validate that the RTL design meets targeted performance