FPGA Design Engineer at GuideTech LLC

Marana, Arizona, United States -

Full Time

Start Date

Immediate

Expiry Date

24 Sep, 26

Salary

0.0

Posted On

26 Jun, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

VHDL, RTL Design, FPGA Development, Vivado, AMD/Xilinx Devices, Digital Logic Design, Hardware Verification, Timing Closure, Git, ModelSim, QuestaSim, Python, Perl, Ruby, Electrical Schematics, Laboratory Equipment

Industry

Defense and Space Manufacturing

Description

Description Location: Tucson, AZ GuideTech, a subsidiary of Palladyne AI (NASDAQ: PDYN), builds high-performance avionics and autonomy software for aerospace, space, and defense systems. We support a wide array of vehicles, from small multi-rotors and heavy lift UAVs to unmanned fighter jets, launch vehicles, spacecraft, re-entry vehicles, missiles, and counter-UAS interceptors. Our culture is grounded in trust, integrity, and a shared commitment to meaningful work. Position Summary We're seeking an experienced FPGA Design Engineer to develop FPGA solutions for next-generation avionics systems. In this role, you'll work on mission-critical aerospace and defense technologies, collaborating with hardware, software, systems, and test engineering teams to bring FPGA designs from concept through hardware validation. What You'll Do Design and implement FPGA solutions using VHDL. Develop RTL and support simulation, synthesis, place and route, timing closure, hardware verification, and implementation. Collaborate with cross-functional engineering teams to integrate FPGA designs into avionics hardware. Support board bring-up, debugging, and hardware validation. Participate in design reviews and technical documentation. Requirements Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field. 8+ years of professional FPGA design and development experience. Strong RTL design experience using VHDL. Experience with the complete FPGA development lifecycle, including RTL design, simulation, synthesis, place and route, timing closure, implementation, and hardware verification. Experience developing FPGA solutions using AMD/Xilinx devices and the Vivado tool suite. Strong understanding of digital logic design, hardware architecture, and hardware/software interaction. Ability to read and understand electrical schematics. Experience using laboratory equipment, including oscilloscopes, spectrum analyzers, signal sources, and power supplies. Strong verbal and written communication skills with the ability to collaborate across multidisciplinary engineering teams. Experience with Git, ModelSim/QuestaSim, and scripting languages such as Python, Perl, or Ruby. Work Authorization & Clearance This position requires the ability to work in the United States without current or future sponsorship. Depending on the nature of the work, the ability to obtain and maintain a U.S. security clearance may be required. Candidates may be asked to provide additional information relevant to clearance eligibility in accordance with applicable laws and regulations. Work Environment This role is based onsite in Tucson, AZ and may involve working in both an office and light production environment. Responsibilities may include occasional standing, lifting, and handling of equipment or materials. The Fine Print No 3rd party candidates will be accepted It is Palladyne AI’s policy to provide equal employment opportunity (EEO) to all persons regardless of race, color, religion, sex, national origin, age, sexual orientation, gender identity, genetic information, physical or mental disability, protected veteran status, or any other characteristic protected by federal, state/provincial, local law.

Responsibilities

Design and implement FPGA solutions using VHDL for next-generation avionics systems. Collaborate with cross-functional teams to integrate designs into hardware and support board bring-up and validation.