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FPGA design FADEC SPU at Scalian Inc

San Diego, California, United States -

Full Time

Start Date

Immediate

Expiry Date

10 Jul, 26

Salary

140000.0

Posted On

11 Apr, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

FPGA Design, FADEC, SPU

Industry

Business Consulting and Services

Description

Additional Information All your information will be kept confidential according to EEO guidelines. Contract type: Full-time W2 Compensation: USD 80000 - USD 140000 - monthly

How To Apply:

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Responsibilities

Responsible for the design and development of FPGA components for FADEC and SPU systems. Ensures all engineering tasks align with project specifications and company standards.