Start Date
Immediate
Expiry Date
13 Sep, 26
Salary
0.0
Posted On
15 Jun, 26
Experience
2 year(s) or above
Remote Job
Yes
Telecommute
Yes
Sponsor Visa
No
Skills
SystemVerilog, Verilog, VHDL, FPGA Development, Timing Closure, AXI Protocols, SoC Architectures, Signal Processing, Image Processing, Functional Verification, Vivado, Vitis, PetaLinux, Python, Cocotb, Real-time Systems
Industry
Computer Hardware Manufacturing