Global Quality IC Package Design/Development Quality Assurance Principal En at Micron Technology
Boise, Idaho, United States -
Full Time


Start Date

Immediate

Expiry Date

18 Mar, 26

Salary

0.0

Posted On

18 Dec, 25

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

Technical Risk Assessment, NUDD Analysis, Qualification Plans, Package Technologies, Root Cause Analysis, Mentoring, Advanced Packaging Technologies, Reliability Test Methods, Reliability Acceleration Modeling, Chip-Package Interaction, Thermomechanical Stresses, Hygroscopic Swelling, Quality Management Tools, Problem-Solving, Cross-Functional Collaboration

Industry

Semiconductor Manufacturing

Description
Execute technical risk assessment and NUDD (New, Unique, Different, Difficult) analysis for new designs/design rules and lead risk mitigation execution. Develop holistic qualification plans and coordinate execution. Provide recommendations on releasing new package technologies based on test results and technical risk assessments. Serve as SME for problem-solving related to package technology, ensuring effective root cause analysis and corrective/preventive actions. Collaborate with customer-facing teams to draft and present content addressing customer issues and requests. Provide SME support and mentoring to elevate package reliability engineering knowledge across the company. Master's degree or equivalent experience in Electrical/Electronics, Mechanical, Material Science and Engineering, Physics, or related field. 7+ years of experience in semiconductor package design, manufacturing, or Quality & Reliability (Q&R). Experience with advanced packaging technologies (e.g., 3DI, Wafer-2-Wafer, SiP). Expert-level applied knowledge of package-level and board-level reliability test methods, reliability acceleration modeling, and sampling statistics. Expert-level understanding of Chip-Package Interaction and effects of thermomechanical and hygroscopic swelling stresses on reliability. Thorough knowledge of semiconductor package designs, assembly processes, and board-level reliability challenges. Understanding of mechanical and material interaction effects on IC component and PCB assembly reliability. Knowledge of statistics and quality management tools (SPC, FMEA, 8D CAR). Self-motivated, detail-oriented, and able to work independently with strong analytical and multi-tasking skills. Excellent written and verbal communication skills in English. Ability to mentor and publish technical papers (internal and external). Experience collaborating with industry standards bodies and driving beneficial changes. Strong problem-solving skills and ability to interact effectively with cross-functional teams.
Responsibilities
The principal engineer will execute technical risk assessments and lead risk mitigation for new designs. They will also develop qualification plans and provide recommendations on new package technologies based on test results.
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