Start Date
Immediate
Expiry Date
14 May, 26
Salary
0.0
Posted On
13 Feb, 26
Experience
0 year(s) or above
Remote Job
Yes
Telecommute
Yes
Sponsor Visa
No
Skills
Verilog, SystemVerilog, UVM, RTL Verification, Logic Simulators, Design Reviews, Test Plan Creation, Test Benches, Constrained Random, Coverage Driven, Reference Models, Scoreboards, SV Assertions, Debugging, Coverage Analysis, DV Code Reviews
Industry
Computers and Electronics Manufacturing