Graphics Design Verification Engineer at Apple

Austin, Texas, United States -

Full Time

Start Date

Immediate

Expiry Date

18 May, 26

Salary

0.0

Posted On

17 Feb, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

RTL Verification, GPU Design, System Verilog, UVM, Test Plan Execution, BFMs, Stimulus Implementation, Coverage Analysis, Debugging, Micro-architecture, C++, Verilog, HDL Simulators, Perl, Shell Scripting, TCL

Industry

Computers and Electronics Manufacturing

Description

Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, resourceful people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it. Do you want to join us in these pursuits? Join us to help deliver the next groundbreaking Apple products! Do you love creating elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC)! You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices! In this highly visible role, you will be at the heart of the chip design effort collaborating with a variety of fields with critical impact in getting products to millions of customers quickly. The Graphics Verification Engineer will be responsible for the pre-silicon RTL verification of blocks in low power embedded graphics cores. This includes deep understanding of the micro-architectural details of their block and how it works within the broader GPU design. A strong computer architecture background, preferably in graphics, and a solid foundation in verification methodology will be required to close testing coverage with high confidence. DESCRIPTION Perform top-level verification for logic blocks in graphics processing unit (GPU) designs. Execute and provide status on test plan items. Port legacy test bench components in System Verilog and Universal Verification Methodology (UVM) including checkers and monitors. Develop top-level tests to validate chip level features. Enable and maintain regressions. Modify and maintain test benches and BFMs. Implement stimulus and analyze coverage. Debug simulation and silicon GPU failures. Work closely with design & micro-architecture teams to understand the functional goals of the design. Develop scripts for software engineering flows. MINIMUM QUALIFICATIONS BS required. Experience with Object Oriented Programming languages. Programming experience in C or C++. Experience with Verilog or other HDLs. PREFERRED QUALIFICATIONS Knowledge of GPU architectures. Understanding of CPU architectures. Familiarity with verification language such as System Verilog/UVM/OVM. Familiarity with various HDL simulators and waveform viewers like IES, VCS, DVE, Verdi. Understanding of constrained random verification process, functional/code coverage, and assertion methodology. Familiarity with Perl, Shell scripting, Makefiles, TCL. Prior exposure to code repositories like Perforce. Ability to work well on a team with a passion to learn from others.

Responsibilities

The Graphics Verification Engineer will be responsible for pre-silicon RTL verification of blocks within low power embedded graphics cores, requiring a deep understanding of micro-architectural details and GPU design integration. Responsibilities include performing top-level verification, executing test plans, developing tests, maintaining regressions, and debugging simulation and silicon failures.